From mboxrd@z Thu Jan 1 00:00:00 1970 From: Suravee Suthikulpanit Subject: Re: [PATCH 1/2 v5] iommu/amd: Fix logic for clearing the IOMMU interrupt bits Date: Thu, 13 Jun 2013 08:48:18 -0500 Message-ID: <51B9CDA2.1010905@amd.com> References: <1370840751-11277-1-git-send-email-suravee.suthikulpanit@amd.com> <51B5CCF002000078000DC9A5@nat28.tlf.novell.com> <20130610121855.GE8802@ocelot.phlegethon.org> <51B5E58802000078000DCA7E@nat28.tlf.novell.com> <51B6E40A02000078000DCF6C@nat28.tlf<51B6E40A02000078000DCF6C@nat28.tlf.novell.com> <51B7ACB5.7070805@amd.com> <51B8303302000078000DD6B6@nat28.tlf.novell.com> <51B8F814.70202@amd.com> <51B923F1.7000802@amd.com> <51B996BA02000078000DDD3D@nat28.tlf.novell.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============8966390250385319923==" Return-path: In-Reply-To: <51B996BA02000078000DDD3D@nat28.tlf.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Jan Beulich Cc: George Dunlap , Tim Deegan , xen-devel@lists.xen.org, Jacob Shin , Sherry Hurwitz List-Id: xen-devel@lists.xenproject.org --===============8966390250385319923== Content-Type: multipart/alternative; boundary="------------000701080509050207030900" --------------000701080509050207030900 Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: 7bit On 6/13/2013 2:54 AM, Jan Beulich wrote: >>>> On 13.06.13 at 03:44, Suravee Suthikulpanit wrote: >> On 6/12/2013 5:37 PM, Suravee Suthikulpanit wrote: >>> Since we are modifying the IOMMU interrupt enabling/disabling, I have >>> been doing some more testing on the IOMMU interrupt handling. I found >>> that IOMMU MSI interrupt is currently broken, but I think this is >>> because of some older changes. I am still tracking down the issue, >>> and will update my findings. >> The following commit broke the IOMMU MSI interrupt: >> >> 2012-11-28 899110e3f6d2a191638e8b50a981c551eeec49e6 AMD IOMMU: >> include IOMMU interrupt information in 'M' debug key output >> (http://xenbits.xen.org/gitweb/?p=xen.git;a=commit;h=899110e3f6d2a191638e8b5 >> 0a981c551eeec49e6) >> >> This patch also need the following patch to resolve kernel panic: >> >> c759fee45bf44f2947a3480d54c03ff7e028c39e AMD IOMMU: add locking missing >> from c/s 26198:ba90ecb0231f >> (http://xenbits.xen.org/gitweb/?p=xen.git;a=commit;h=c759fee45bf44f2947a3480 >> d54c03ff7e028c39e) >> >> I'll update once I root cause the issue. > I'll also take a look, but it would help to know in what way it is > broken: Some sort of crash, no interrupt delivered, ... This surely > needs to be resolved before 4.3 can go out - George, can you put > this on your bug list, please? > > Jan > BasicallyI amnot seeing any interrupts coming in from the IOMMU. I was testing it by setting the ComWaitIntEn bit of the IOMMU control register to let the IOMMU hardware generate MSI interrupts for the COMPLETION_WAIT command. I am not seeing any interrupts (i.e. The interrupt handler and tasklet handler function is never executed). I have double checked this in the latest Xen-4.2.x, and they are working fine. The same MSI interrupt is also used for PPR and Event Log. Suravee --------------000701080509050207030900 Content-Type: text/html; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit
On 6/13/2013 2:54 AM, Jan Beulich wrote:
On 13.06.13 at 03:44, Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> wrote:

On 6/12/2013 5:37 PM, Suravee Suthikulpanit wrote:

Since we are modifying the IOMMU interrupt enabling/disabling, I have 
been doing some more testing on the IOMMU interrupt handling. I found 
that IOMMU MSI interrupt is currently broken, but I think this is 
because of some older changes.  I am still tracking down the issue, 
and will update my findings.

The following commit broke the IOMMU MSI interrupt:

2012-11-28    899110e3f6d2a191638e8b50a981c551eeec49e6 AMD IOMMU: 
include IOMMU interrupt information in 'M' debug key output
(http://xenbits.xen.org/gitweb/?p=xen.git;a=commit;h=899110e3f6d2a191638e8b5 
0a981c551eeec49e6)

This patch also need the following patch to resolve kernel panic:

c759fee45bf44f2947a3480d54c03ff7e028c39e AMD IOMMU: add locking missing 
from c/s 26198:ba90ecb0231f
(http://xenbits.xen.org/gitweb/?p=xen.git;a=commit;h=c759fee45bf44f2947a3480 
d54c03ff7e028c39e)

I'll update once I root cause the issue.

I'll also take a look, but it would help to know in what way it is
broken: Some sort of crash, no interrupt delivered, ... This surely
needs to be resolved before 4.3 can go out - George, can you put
this on your bug list, please?

Jan


Basically I am not seeing any interrupts coming in from the IOMMU.  I was testing it by setting the 
ComWaitIntEn bit of the IOMMU control register to let the IOMMU hardware generate MSI interrupts for
the COMPLETION_WAIT command.  I am not seeing any interrupts (i.e. The interrupt handler and
tasklet handler function is never executed).  I have double checked this in the latest Xen-4.2.x, and they
are working fine.  The same MSI interrupt is also used for PPR and Event Log.

Suravee
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