From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Singapore Citizen Mr. Teo En Ming (Zhang Enming)" Subject: Result of Applying IGD VGA Passthrough Patches to Xen 4.4-unstable Changeset 27238 Date: Tue, 16 Jul 2013 12:31:28 +0800 Message-ID: <51E4CCA0.8000604@gmail.com> Reply-To: singapore.mr.teo.en.ming@gmail.com Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="------------000006000401020503000804" Return-path: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: "xen-users@lists.xen.org" , "xen-devel@lists.xen.org" , "Teo En Ming (Zhang Enming)" , =?ISO-8859-1?Q?Pasi_K=E4rkk=E4inen?= , Ian Campbell , Konrad Rzeszutek Wilk List-Id: xen-devel@lists.xenproject.org This is a multi-part message in MIME format. --------------000006000401020503000804 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Hi, I have just applied IGD VGA Passthrough patches to Xen 4.4-unstable changeset 27238. Please refer to the 2 attached patches. 1. [Xen-devel] [PATCH 2/3] V4 qemu-xen-trad: Correctly expose PCH ISA bridge for IGD passthrough Link: http://lists.xenproject.org/archives/html/xen-devel/2013-06/msg01720.html 2. [Xen-devel] [PATCH 3/3] qemu-xen-trad: IGD passthrough: Expose vendor specific pci cap on host bridge. Link: http://lists.xenproject.org/archives/html/xen-devel/2013-02/msg00538.html These are the steps I took to patch, compile and install Xen 4.4-unstable changeset 27238. cd hg clone -r 27238 http://xenbits.xensource.com/xen-unstable.hg xen-unstable.hg-cs27238 cd xen-unstable.hg-cs27238 sudo -s ./configure make world make clean cd tools/qemu-xen-traditional-dir-remote patch -p1 < patch2of3.txt patch -p1 < patch3of3.txt cd ../.. make world make install However, I still encountered problems installing Intel HD Graphics display drivers. The driver installation would auto detect the display adapter, causing the LCD monitor to blink 1-2 times. But after that, the LCD monitor goes into Power Saving mode (blank screen) forever again. I tried to destroy the Windows 8 HVM domU and restart it. Windows 8 HVM domU would start up for a few seconds, then falls back to blank LCD monitor screen forever again. Please advise. Thank you very much. -- Yours sincerely, Singapore Citizen Mr. Teo En Ming (Zhang Enming) --------------000006000401020503000804 Content-Type: text/plain; charset=UTF-8; name="patch2of3.txt" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="patch2of3.txt" Signed-off-by: Stefano Stabellini , Rui Guo Tested-by: Rui Guo Xen-devel: http://marc.info/?l=xen-devel&m=135548433715750 --- hw/pci.c | 10 ++++++++++ hw/pci.h | 3 +++ hw/pt-graphics.c | 9 ++++++--- 3 files changed, 19 insertions(+), 3 deletions(-) diff --git a/hw/pci.c b/hw/pci.c index f051de1..c423285 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -938,6 +938,16 @@ PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint16_t vid, uint16_t did, return s->bus; } +PCIBus *pci_isa_bridge_init(PCIBus *bus, int devfn, uint16_t vid, uint16_t did, + uint8_t rid, pci_map_irq_fn map_irq, const char *name) +{ + PCIBus *s = pci_bridge_init(bus, devfn, vid, did, rid, map_irq, name); + + pci_config_set_class(s->parent_dev->config, PCI_CLASS_BRIDGE_ISA); + s->parent_dev->config[PCI_HEADER_TYPE] = 0x80; + return s; +} + int pt_chk_bar_overlap(PCIBus *bus, int devfn, uint32_t addr, uint32_t size, uint8_t type) { diff --git a/hw/pci.h b/hw/pci.h index edc58b6..cacbdd2 100644 --- a/hw/pci.h +++ b/hw/pci.h @@ -271,6 +271,9 @@ void pci_info(void); PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint16_t vid, uint16_t did, uint8_t rid, pci_map_irq_fn map_irq, const char *name); +PCIBus *pci_isa_bridge_init(PCIBus *bus, int devfn, uint16_t vid, uint16_t did, + uint8_t rid, pci_map_irq_fn map_irq, const char *name); + #define NR_PCI_FUNC 8 #define NR_PCI_DEV 32 #define NR_PCI_DEVFN (NR_PCI_FUNC * NR_PCI_DEV) diff --git a/hw/pt-graphics.c b/hw/pt-graphics.c index c6f8869..7302b25 100644 --- a/hw/pt-graphics.c +++ b/hw/pt-graphics.c @@ -3,6 +3,7 @@ */ #include "pass-through.h" +#include "pci.h" #include "pci/header.h" #include "pci/pci.h" @@ -40,9 +41,11 @@ void intel_pch_init(PCIBus *bus) did = pt_pci_host_read(pci_dev_1f, PCI_DEVICE_ID, 2); rid = pt_pci_host_read(pci_dev_1f, PCI_REVISION, 1); - if ( vid == PCI_VENDOR_ID_INTEL ) - pci_bridge_init(bus, PCI_DEVFN(0x1f, 0), vid, did, rid, - pch_map_irq, "intel_bridge_1f"); + if (vid == PCI_VENDOR_ID_INTEL) { + pci_isa_bridge_init(bus, PCI_DEVFN(0x1f, 0), vid, did, rid, + pch_map_irq, "intel_bridge_1f"); + + } } uint32_t igd_read_opregion(struct pt_dev *pci_dev) -- 1.7.10.4 --------------000006000401020503000804 Content-Type: text/plain; charset=UTF-8; name="patch3of3.txt" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="patch3of3.txt" Signed-off-by: Jean Guyader , Rui Guo Tested-by: Rui Guo Xen-devel: http://marc.info/?l=xen-devel&m=135748187808766 --- hw/pass-through.c | 2 +- hw/pt-graphics.c | 69 ++++++++++++++++++++++++++++++++++++++++++++++++----- 2 files changed, 64 insertions(+), 7 deletions(-) diff --git a/hw/pass-through.c b/hw/pass-through.c index 304c438..2e795e1 100644 --- a/hw/pass-through.c +++ b/hw/pass-through.c @@ -2101,7 +2101,7 @@ struct pci_dev *pt_pci_get_dev(int bus, int dev, int fn) u32 pt_pci_host_read(struct pci_dev *pci_dev, u32 addr, int len) { - u32 val = -1; + u32 val = 0; pci_access_init(); pci_read_block(pci_dev, addr, (u8 *) &val, len); diff --git a/hw/pt-graphics.c b/hw/pt-graphics.c index 5d4cf4a..269aade 100644 --- a/hw/pt-graphics.c +++ b/hw/pt-graphics.c @@ -144,6 +144,53 @@ write_default: pci_default_write_config(pci_dev, config_addr, val, len); } +#define PCI_INTEL_VENDOR_CAP 0x34 +#define PCI_INTEL_VENDOR_CAP_TYPE 0x09 +/* + * This function returns 0 is the value hasn't been + * updated. That mean the offset doesn't anything to + * do with the vendor capability. + */ +static uint32_t igd_pci_read_vendor_cap(PCIDevice *pci_dev, uint32_t config_addr, int len, + uint32_t *val) +{ + struct pci_dev *pci_dev_host_bridge = pt_pci_get_dev(0, 0, 0); + uint32_t vendor_cap = 0; + uint32_t cap_type = 0; + uint32_t cap_size = 0; + + vendor_cap = pt_pci_host_read(pci_dev_host_bridge, PCI_INTEL_VENDOR_CAP, 1); + if (!vendor_cap) + return 0; + + cap_type = pt_pci_host_read(pci_dev_host_bridge, vendor_cap, 1); + if (cap_type != PCI_INTEL_VENDOR_CAP_TYPE) + return 0; + + if (config_addr == PCI_INTEL_VENDOR_CAP) + { + *val = vendor_cap; + return 1; + } + + /* Remove the next capability link */ + if (config_addr == vendor_cap + 1) + { + *val = 0; + return 1; + } + + cap_size = pt_pci_host_read(pci_dev_host_bridge, vendor_cap + 2, 1); + if (config_addr >= vendor_cap && + config_addr + len <= vendor_cap + cap_size) + { + *val = pt_pci_host_read(pci_dev_host_bridge, config_addr, len); + return 1; + } + + return 0; +} + uint32_t igd_pci_read(PCIDevice *pci_dev, uint32_t config_addr, int len) { struct pci_dev *pci_dev_host_bridge; @@ -151,12 +198,22 @@ uint32_t igd_pci_read(PCIDevice *pci_dev, uint32_t config_addr, int len) assert(pci_dev->devfn == 0x00); if ( !igd_passthru ) - goto read_default; + { + val = pci_default_read_config(pci_dev, config_addr, len); + goto read_return; + } + /* Exposing writable register does not lead to security risk since this + only apply to read. This may confuse the guest, but it works good so far. + Will switch to mask & merge style only if this is proved broken. + Note: Always expose aligned address if any byte of the dword is to be + exposed. This provides a consistent view, at least for read. */ switch (config_addr) { case 0x00: /* vendor id */ case 0x02: /* device id */ + case 0x04: /* command */ + case 0x06: /* status, needed for the cap list bit*/ case 0x08: /* revision id */ case 0x2c: /* sybsystem vendor id */ case 0x2e: /* sybsystem id */ @@ -169,7 +226,9 @@ uint32_t igd_pci_read(PCIDevice *pci_dev, uint32_t config_addr, int len) case 0xa8: /* SNB: base of GTT stolen memory */ break; default: - goto read_default; + if (!(igd_passthru && igd_pci_read_vendor_cap(pci_dev, config_addr, len, &val))) + val = pci_default_read_config(pci_dev, config_addr, len); + goto read_return; } /* Host read */ @@ -180,15 +239,13 @@ uint32_t igd_pci_read(PCIDevice *pci_dev, uint32_t config_addr, int len) } val = pt_pci_host_read(pci_dev_host_bridge, config_addr, len); + +read_return: #ifdef PT_DEBUG_PCI_CONFIG_ACCESS PT_LOG_DEV(pci_dev, "addr=%x len=%x val=%x\n", config_addr, len, val); #endif return val; - -read_default: - - return pci_default_read_config(pci_dev, config_addr, len); } /* -- 1.7.10.4 --------------000006000401020503000804 Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel --------------000006000401020503000804--