From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Jan Beulich <JBeulich@suse.com>,
xen-devel <xen-devel@lists.xenproject.org>
Cc: Kevin Tian <kevin.tian@intel.com>, Jun Nakajima <jun.nakajima@intel.com>
Subject: Re: [PATCH 1/2] VMX: correct feature checks for MPX and XSAVES
Date: Mon, 5 Sep 2016 16:11:55 +0100 [thread overview]
Message-ID: <51a891b1-dad6-bab4-9c1c-03dfda6074be@citrix.com> (raw)
In-Reply-To: <57C96EC6020000780010B305@prv-mh.provo.novell.com>
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On 02/09/16 11:21, Jan Beulich wrote:
> Their VMCS fields aren't tied to the respective base CPU feature flags
> but instead to VMX specific ones.
>
> Note that while the VMCS GUEST_BNDCFGS field exists if either of the
> two respective features is available, MPX continues to get exposed to
> guests only with both features present.
>
> Also add the so far missing handling of
> - GUEST_BNDCFGS in construct_vmcs()
> - MSR_IA32_BNDCFGS in vmx_msr_{read,write}_intercept()
> and mirror the extra correctness checks during MSR write to
> vmx_load_msr().
>
> Reported-by: "Rockosov, Dmitry" <dmitry.rockosov@intel.com>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
> Tested-by: "Rockosov, Dmitry" <dmitry.rockosov@intel.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
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next prev parent reply other threads:[~2016-09-05 15:12 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-02 10:17 [PATCH 0/2] x86/HVM: feature checking improvements Jan Beulich
2016-09-02 10:21 ` [PATCH 1/2] VMX: correct feature checks for MPX and XSAVES Jan Beulich
2016-09-05 15:11 ` Andrew Cooper [this message]
2016-09-07 5:29 ` Tian, Kevin
2016-09-02 10:21 ` [PATCH 2/2] x86/HVM: adjust feature checking in MSR intercept handling Jan Beulich
2016-09-05 15:20 ` Andrew Cooper
2016-09-07 5:36 ` Tian, Kevin
2016-09-07 7:58 ` Jan Beulich
2016-09-07 8:28 ` Tian, Kevin
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