From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Cooper Subject: Re: [PATCH 3/7] Nested VMX: Force check ISR when L2 is running Date: Fri, 9 Aug 2013 11:38:37 +0100 Message-ID: <5204C6AD.7000607@citrix.com> References: <1376038175-18571-1-git-send-email-yang.z.zhang@intel.com> <1376038175-18571-4-git-send-email-yang.z.zhang@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1376038175-18571-4-git-send-email-yang.z.zhang@intel.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Yang Zhang Cc: xen-devel@lists.xensource.com, keir.xen@gmail.com, JBeulich@suse.com List-Id: xen-devel@lists.xenproject.org On 09/08/13 09:49, Yang Zhang wrote: > From: Yang Zhang > > If L2 is running, external interrupt is allowed to notify CPU only > when it has higher priority than current in servicing interrupt. Since > there is no vAPIC-v for L2, so force check isr when L2 is running. > > Signed-off-by: Yang Zhang > --- > xen/arch/x86/hvm/vlapic.c | 4 +++- > 1 files changed, 3 insertions(+), 1 deletions(-) > > diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c > index 20a36a0..f2594dd 100644 > --- a/xen/arch/x86/hvm/vlapic.c > +++ b/xen/arch/x86/hvm/vlapic.c > @@ -37,6 +37,7 @@ > #include > #include > #include > +#include > #include > #include > > @@ -1037,7 +1038,8 @@ int vlapic_has_pending_irq(struct vcpu *v) > if ( irr == -1 ) > return -1; > > - if ( vlapic_virtual_intr_delivery_enabled() ) > + if ( vlapic_virtual_intr_delivery_enabled() && > + !nestedhvm_vcpu_in_guestmode(v) ) Alignment, but otherwise ok. ~Andrew > return irr; > > isr = vlapic_find_highest_isr(vlapic);