From mboxrd@z Thu Jan 1 00:00:00 1970 From: Julien Grall Subject: Re: [PATCH 3/7] xen/arm: Initialize correctly IRQ routing Date: Tue, 10 Sep 2013 16:26:48 +0100 Message-ID: <522F3A38.7010205@linaro.org> References: <1377869433-15385-1-git-send-email-julien.grall@linaro.org> <1377869433-15385-4-git-send-email-julien.grall@linaro.org> <1378732639.19967.128.camel@kazak.uk.xensource.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1378732639.19967.128.camel@kazak.uk.xensource.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Ian Campbell Cc: stefano.stabellini@eu.citrix.com, patches@linaro.org, xen-devel@lists.xen.org List-Id: xen-devel@lists.xenproject.org On 09/09/2013 02:17 PM, Ian Campbell wrote: > On Fri, 2013-08-30 at 14:30 +0100, Julien Grall wrote: >> When Xen initialize the GIC distributor, we need to route all the IRQs to >> the boot CPU. The CPU ID can differ between Xen and the GIC. >> >> When ITARGETSR0 is read, each field will return a value that corresponds >> only to the processor reading the register. > > This trick is used a few times in this series, is it really the best way > to figure this out? > Not in some ID register or in DT? Unfortunately not. On the patch #4, I introduce an array to store the mapping between logical ID and gic ID. I didn't use this trick here, because the distributor is initialized before each cpu interface. >> So Xen can use the PPI 0 to >> initialize correctly the routing. >> >> Signed-off-by: Julien Grall >> --- >> xen/arch/arm/gic.c | 3 ++- >> 1 file changed, 2 insertions(+), 1 deletion(-) >> >> diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c >> index 37a73fb..cadc258 100644 >> --- a/xen/arch/arm/gic.c >> +++ b/xen/arch/arm/gic.c >> @@ -275,9 +275,10 @@ void gic_route_dt_irq(const struct dt_irq *irq, const cpumask_t *cpu_mask, >> static void __init gic_dist_init(void) >> { >> uint32_t type; >> - uint32_t cpumask = 1 << smp_processor_id(); >> + uint32_t cpumask; >> int i; >> >> + cpumask = GICD[GICD_ITARGETSR] & 0xff; >> cpumask |= cpumask << 8; >> cpumask |= cpumask << 16; >> > > -- Julien Grall