From mboxrd@z Thu Jan 1 00:00:00 1970 From: Julien Grall Subject: Re: [PATCH 3/7] xen/arm: Initialize correctly IRQ routing Date: Tue, 10 Sep 2013 16:29:33 +0100 Message-ID: <522F3ADD.1050405@linaro.org> References: <1377869433-15385-1-git-send-email-julien.grall@linaro.org> <1377869433-15385-4-git-send-email-julien.grall@linaro.org> <1378732639.19967.128.camel@kazak.uk.xensource.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1378732639.19967.128.camel@kazak.uk.xensource.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Ian Campbell Cc: stefano.stabellini@eu.citrix.com, patches@linaro.org, xen-devel@lists.xen.org List-Id: xen-devel@lists.xenproject.org On 09/09/2013 02:17 PM, Ian Campbell wrote: > On Fri, 2013-08-30 at 14:30 +0100, Julien Grall wrote: >> When Xen initialize the GIC distributor, we need to route all the IRQs to >> the boot CPU. The CPU ID can differ between Xen and the GIC. >> >> When ITARGETSR0 is read, each field will return a value that corresponds >> only to the processor reading the register. > > This trick is used a few times in this series, is it really the best way > to figure this out? I forgot to answer to this question. When I wrote this code, I wasn't sure if it's the best way. Linux does the same and the gic documentation doesn't offer a better solution. I saw some device tree with GIC cpu interface node but it's not upstream and disappear from the latest Linaro kernel. -- Julien Grall