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From: Julien Grall <julien.grall@linaro.org>
To: Ian Campbell <ian.campbell@citrix.com>
Cc: stefano.stabellini@eu.citrix.com, tim@xen.org, xen-devel@lists.xen.org
Subject: Re: [PATCH EXTRA] xen: arm: move smp_init_cpus to smpboot.c
Date: Fri, 27 Sep 2013 16:47:48 +0100	[thread overview]
Message-ID: <5245A8A4.6000408@linaro.org> (raw)
In-Reply-To: <1380296681-15810-1-git-send-email-ian.campbell@citrix.com>

On 09/27/2013 04:44 PM, Ian Campbell wrote:
> Seems like a better home.
> 
> Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Julien Grall <julien.grall@linaro.org>
> ---
>  xen/arch/arm/setup.c      |  125 --------------------------------------------
>  xen/arch/arm/smpboot.c    |  126 +++++++++++++++++++++++++++++++++++++++++++++
>  xen/include/asm-arm/smp.h |    1 +
>  3 files changed, 127 insertions(+), 125 deletions(-)
> 
> diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c
> index b2c4101..49f344c 100644
> --- a/xen/arch/arm/setup.c
> +++ b/xen/arch/arm/setup.c
> @@ -588,131 +588,6 @@ void __init setup_cache(void)
>      cacheline_bytes = 1U << (4 + (ccsid & 0x7));
>  }
>  
> -/* Parse the device tree and build the logical map array containing
> - * MPIDR values related to logical cpus
> - * Code base on Linux arch/arm/kernel/devtree.c
> - */
> -static void __init smp_init_cpus(void)
> -{
> -    register_t mpidr;
> -    struct dt_device_node *cpus = dt_find_node_by_path("/cpus");
> -    struct dt_device_node *cpu;
> -    unsigned int i, j;
> -    unsigned int cpuidx = 1;
> -    static u32 tmp_map[NR_CPUS] __initdata =
> -    {
> -        [0 ... NR_CPUS - 1] = MPIDR_INVALID
> -    };
> -    bool_t bootcpu_valid = 0;
> -    int rc;
> -
> -    if ( (rc = arch_smp_init()) < 0 )
> -    {
> -        printk(XENLOG_WARNING "SMP init failed (%d)\n"
> -               "Using only 1 CPU\n", rc);
> -        return;
> -    }
> -
> -    mpidr = boot_cpu_data.mpidr.bits & MPIDR_HWID_MASK;
> -
> -    if ( !cpus )
> -    {
> -        printk(XENLOG_WARNING "WARNING: Can't find /cpus in the device tree.\n"
> -               "Using only 1 CPU\n");
> -        return;
> -    }
> -
> -    dt_for_each_child_node( cpus, cpu )
> -    {
> -        u32 hwid;
> -
> -        if ( !dt_device_type_is_equal(cpu, "cpu") )
> -            continue;
> -
> -        if ( !dt_property_read_u32(cpu, "reg", &hwid) )
> -        {
> -            printk(XENLOG_WARNING "cpu node `%s`: missing reg property\n",
> -                   dt_node_full_name(cpu));
> -            continue;
> -        }
> -
> -        /*
> -         * 8 MSBs must be set to 0 in the DT since the reg property
> -         * defines the MPIDR[23:0]
> -         */
> -        if ( hwid & ~MPIDR_HWID_MASK )
> -        {
> -            printk(XENLOG_WARNING "cpu node `%s`: invalid hwid value (0x%x)\n",
> -                   dt_node_full_name(cpu), hwid);
> -            continue;
> -        }
> -
> -        /*
> -         * Duplicate MPIDRs are a recipe for disaster. Scan all initialized
> -         * entries and check for duplicates. If any found just skip the node.
> -         * temp values values are initialized to MPIDR_INVALID to avoid
> -         * matching valid MPIDR[23:0] values.
> -         */
> -        for ( j = 0; j < cpuidx; j++ )
> -        {
> -            if ( tmp_map[j] == hwid )
> -            {
> -                printk(XENLOG_WARNING "cpu node `%s`: duplicate /cpu reg properties in the DT\n",
> -                       dt_node_full_name(cpu));
> -                continue;
> -            }
> -        }
> -
> -        /*
> -         * Build a stashed array of MPIDR values. Numbering scheme requires
> -         * that if detected the boot CPU must be assigned logical id 0. Other
> -         * CPUs get sequential indexes starting from 1. If a CPU node
> -         * with a reg property matching the boot CPU MPIDR is detected,
> -         * this is recorded and so that the logical map build from DT is
> -         * validated and can be used to set the map.
> -         */
> -        if ( hwid == mpidr )
> -        {
> -            i = 0;
> -            bootcpu_valid = 1;
> -        }
> -        else
> -            i = cpuidx++;
> -
> -        if ( cpuidx > NR_CPUS )
> -        {
> -            printk(XENLOG_WARNING
> -                   "DT /cpu %u node greater than max cores %u, capping them\n",
> -                   cpuidx, NR_CPUS);
> -            cpuidx = NR_CPUS;
> -            break;
> -        }
> -
> -        if ( (rc = arch_cpu_init(i, cpu)) < 0 )
> -        {
> -            printk("cpu%d init failed (hwid %x): %d\n", i, hwid, rc);
> -            tmp_map[i] = MPIDR_INVALID;
> -        }
> -        else
> -            tmp_map[i] = hwid;
> -    }
> -
> -    if ( !bootcpu_valid )
> -    {
> -        printk(XENLOG_WARNING "DT missing boot CPU MPIDR[23:0]\n"
> -               "Using only 1 CPU\n");
> -        return;
> -    }
> -
> -    for ( i = 0; i < cpuidx; i++ )
> -    {
> -        if ( tmp_map[i] == MPIDR_INVALID )
> -            continue;
> -        cpumask_set_cpu(i, &cpu_possible_map);
> -        cpu_logical_map(i) = tmp_map[i];
> -    }
> -}
> -
>  /* C entry point for boot CPU */
>  void __init start_xen(unsigned long boot_phys_offset,
>                        unsigned long fdt_paddr,
> diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c
> index 2cb0f36..b836be4 100644
> --- a/xen/arch/arm/smpboot.c
> +++ b/xen/arch/arm/smpboot.c
> @@ -89,6 +89,132 @@ smp_clear_cpu_maps (void)
>      cpu_logical_map(0) = READ_SYSREG(MPIDR_EL1) & MPIDR_HWID_MASK;
>  }
>  
> +/* Parse the device tree and build the logical map array containing
> + * MPIDR values related to logical cpus
> + * Code base on Linux arch/arm/kernel/devtree.c
> + */
> +void __init smp_init_cpus(void)
> +{
> +    register_t mpidr;
> +    struct dt_device_node *cpus = dt_find_node_by_path("/cpus");
> +    struct dt_device_node *cpu;
> +    unsigned int i, j;
> +    unsigned int cpuidx = 1;
> +    static u32 tmp_map[NR_CPUS] __initdata =
> +    {
> +        [0 ... NR_CPUS - 1] = MPIDR_INVALID
> +    };
> +    bool_t bootcpu_valid = 0;
> +    int rc;
> +
> +    if ( (rc = arch_smp_init()) < 0 )
> +    {
> +        printk(XENLOG_WARNING "SMP init failed (%d)\n"
> +               "Using only 1 CPU\n", rc);
> +        return;
> +    }
> +
> +    mpidr = boot_cpu_data.mpidr.bits & MPIDR_HWID_MASK;
> +
> +    if ( !cpus )
> +    {
> +        printk(XENLOG_WARNING "WARNING: Can't find /cpus in the device tree.\n"
> +               "Using only 1 CPU\n");
> +        return;
> +    }
> +
> +    dt_for_each_child_node( cpus, cpu )
> +    {
> +        u32 hwid;
> +
> +        if ( !dt_device_type_is_equal(cpu, "cpu") )
> +            continue;
> +
> +        if ( !dt_property_read_u32(cpu, "reg", &hwid) )
> +        {
> +            printk(XENLOG_WARNING "cpu node `%s`: missing reg property\n",
> +                   dt_node_full_name(cpu));
> +            continue;
> +        }
> +
> +        /*
> +         * 8 MSBs must be set to 0 in the DT since the reg property
> +         * defines the MPIDR[23:0]
> +         */
> +        if ( hwid & ~MPIDR_HWID_MASK )
> +        {
> +            printk(XENLOG_WARNING "cpu node `%s`: invalid hwid value (0x%x)\n",
> +                   dt_node_full_name(cpu), hwid);
> +            continue;
> +        }
> +
> +        /*
> +         * Duplicate MPIDRs are a recipe for disaster. Scan all initialized
> +         * entries and check for duplicates. If any found just skip the node.
> +         * temp values values are initialized to MPIDR_INVALID to avoid
> +         * matching valid MPIDR[23:0] values.
> +         */
> +        for ( j = 0; j < cpuidx; j++ )
> +        {
> +            if ( tmp_map[j] == hwid )
> +            {
> +                printk(XENLOG_WARNING
> +                       "cpu node `%s`: duplicate /cpu reg properties in the DT\n",
> +                       dt_node_full_name(cpu));
> +                continue;
> +            }
> +        }
> +
> +        /*
> +         * Build a stashed array of MPIDR values. Numbering scheme requires
> +         * that if detected the boot CPU must be assigned logical id 0. Other
> +         * CPUs get sequential indexes starting from 1. If a CPU node
> +         * with a reg property matching the boot CPU MPIDR is detected,
> +         * this is recorded and so that the logical map build from DT is
> +         * validated and can be used to set the map.
> +         */
> +        if ( hwid == mpidr )
> +        {
> +            i = 0;
> +            bootcpu_valid = 1;
> +        }
> +        else
> +            i = cpuidx++;
> +
> +        if ( cpuidx > NR_CPUS )
> +        {
> +            printk(XENLOG_WARNING
> +                   "DT /cpu %u node greater than max cores %u, capping them\n",
> +                   cpuidx, NR_CPUS);
> +            cpuidx = NR_CPUS;
> +            break;
> +        }
> +
> +        if ( (rc = arch_cpu_init(i, cpu)) < 0 )
> +        {
> +            printk("cpu%d init failed (hwid %x): %d\n", i, hwid, rc);
> +            tmp_map[i] = MPIDR_INVALID;
> +        }
> +        else
> +            tmp_map[i] = hwid;
> +    }
> +
> +    if ( !bootcpu_valid )
> +    {
> +        printk(XENLOG_WARNING "DT missing boot CPU MPIDR[23:0]\n"
> +               "Using only 1 CPU\n");
> +        return;
> +    }
> +
> +    for ( i = 0; i < cpuidx; i++ )
> +    {
> +        if ( tmp_map[i] == MPIDR_INVALID )
> +            continue;
> +        cpumask_set_cpu(i, &cpu_possible_map);
> +        cpu_logical_map(i) = tmp_map[i];
> +    }
> +}
> +
>  int __init
>  smp_get_max_cpus (void)
>  {
> diff --git a/xen/include/asm-arm/smp.h b/xen/include/asm-arm/smp.h
> index 83add6c..1485cc6 100644
> --- a/xen/include/asm-arm/smp.h
> +++ b/xen/include/asm-arm/smp.h
> @@ -24,6 +24,7 @@ extern int arch_cpu_up(int cpu);
>  /* Secondary CPU entry point */
>  extern void init_secondary(void);
>  
> +extern void smp_init_cpus(void);
>  extern void smp_clear_cpu_maps (void);
>  extern int smp_get_max_cpus (void);
>  #endif
> 


-- 
Julien Grall

      reply	other threads:[~2013-09-27 15:47 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-09-27 13:28 [PATCH v4 00/11] xen: arm: rework early bring up Ian Campbell
2013-09-27 13:29 ` [PATCH v4 01/11] xen: arm: Load xen under 4GB on 32-bit Ian Campbell
2013-09-27 13:29 ` [PATCH v4 02/11] xen: arm: build platform support only on the relevant arch Ian Campbell
2013-09-27 13:29 ` [PATCH v4 03/11] xen: arm: Log the raw MIDR on boot Ian Campbell
2013-09-27 13:29 ` [PATCH v4 04/11] xen: arm: make sure we stay within the memory bank during mm setup Ian Campbell
2013-09-27 13:29 ` [PATCH v4 05/11] xen: arm: add two new device tree helpers Ian Campbell
2013-09-27 13:29 ` [PATCH v4 06/11] xen: arm: implement arch/platform SMP and CPU initialisation framework Ian Campbell
2013-09-27 13:29 ` [PATCH v4 07/11] xen: arm: implement smp initialisation callbacks for exynos5 Ian Campbell
2013-09-27 15:12   ` Julien Grall
2013-09-27 13:29 ` [PATCH v4 08/11] xen: arm: rewrite start of day page table and cpu bring up Ian Campbell
2013-09-27 13:29 ` [PATCH v4 09/11] xen: arm: use symbolic names for MPIDR bits Ian Campbell
2013-09-27 13:29 ` [PATCH v4 10/11] xen: arm: configure TCR_EL2 for 40 bit physical address space Ian Campbell
2013-09-27 13:29 ` [PATCH v4 11/11] xen: arm: split cpu0's domheap mapping PTs out from xen_second Ian Campbell
2013-09-27 15:44 ` [PATCH EXTRA] xen: arm: move smp_init_cpus to smpboot.c Ian Campbell
2013-09-27 15:47   ` Julien Grall [this message]

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