From mboxrd@z Thu Jan 1 00:00:00 1970 From: Julien Grall Subject: Re: [PATCH 2/6] xen: arm: Enable 40 bit addressing in VTCR for arm64 Date: Mon, 21 Oct 2013 16:56:37 +0100 Message-ID: <52654EB5.7030802@linaro.org> References: <1381416204.17758.36.camel@kazak.uk.xensource.com> <1381416225-31043-2-git-send-email-ian.campbell@citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1381416225-31043-2-git-send-email-ian.campbell@citrix.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Ian Campbell , xen-devel@lists.xen.org Cc: tim@xen.org, Pranavkumar Sawargaonkar , Anup Patel , stefano.stabellini@eu.citrix.com List-Id: xen-devel@lists.xenproject.org On 10/10/2013 03:43 PM, Ian Campbell wrote: > This requires setting the v8 specific VTCR_EL2.PS field. These bits are > UNK/SBZP on v7. > > Also the TS0SZ field is described slightly differently for v8, so update the > comment to reflect this. > > Signed-off-by: Ian Campbell Acked-by: Julien Grall -- Julien Grall