From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Cooper Subject: Request complete reversion of XSA-60 patches Date: Wed, 13 Nov 2013 20:46:09 +0000 Message-ID: <5283E511.6000004@citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Xen-devel List , Keir Fraser , Jan Beulich List-Id: xen-devel@lists.xenproject.org Hello, Following CID 1128574 (Data race condition writing to vcpu->arch.hvm_vcpu.cache_mode), I took a closer look at the expected semantics surrounding domain->arch.hvm_domain.is_in_uc_mode Embarrassingly, none of the reviewer (myself included) noticed that the new "hvm_shadow_handle_cd()" was actually the regular CR0.CD switching code for AMD SVM, which is now hidden behind an optional hvm_funcs pointer only implemented in VT-x. The changeset 62652c00efa55fb45374bcc92f7d96fc411aebb2 has therefore caused a complete functional regression in AMD wrt CR0.CD handling. >>From my understanding after investigating, the new "hvm_shadow_handle_cd()" function was actually common which needed doing in all cases, otherwise HAP logdirty mode will break. Therefore, this change appears to have broken migration as well. Furthermore, the series already missed correct cache flushing in certain cases (e.g. writing the hypercall page). I request that the series be reverted in it's entirety to minimise the collateral damage until a full, complete and correct set of fixes can be made. ~Andrew