From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?UTF-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= Subject: Re: [PATCH 1/2] pvh: clearly specify used parameters in vcpu_guest_context Date: Wed, 20 Nov 2013 10:18:12 +0100 Message-ID: <528C7E54.7030106@citrix.com> References: <1384864488-5194-1-git-send-email-roger.pau@citrix.com> <1384864488-5194-2-git-send-email-roger.pau@citrix.com> <528B768C0200007800104810@nat28.tlf.novell.com> <528B7DF5.1000603@citrix.com> <528B93260200007800104972@nat28.tlf.novell.com> <528B94F6.3090804@citrix.com> <528BA59D0200007800104ABD@nat28.tlf.novell.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="------------010402080106080707090107" Return-path: Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Vj3vN-0006b8-Fr for xen-devel@lists.xenproject.org; Wed, 20 Nov 2013 09:18:17 +0000 In-Reply-To: <528BA59D0200007800104ABD@nat28.tlf.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Jan Beulich Cc: George Dunlap , xen-devel@lists.xenproject.org, Keir Fraser , Tim Deegan List-Id: xen-devel@lists.xenproject.org --------------010402080106080707090107 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit On 19/11/13 17:53, Jan Beulich wrote: >>>> On 19.11.13 at 17:42, Roger Pau Monné wrote: >> On 19/11/13 16:34, Jan Beulich wrote: >>>>>> On 19.11.13 at 16:04, Roger Pau Monné wrote: >>>> On 19/11/13 14:32, Jan Beulich wrote: >>>>> Also, by now honoring CR0 and CR4 settings, you again move >>>>> towards the hybrid model (some fields honored, some refused) >>>>> that was (I think by you) previously described as unacceptable. >>>> >>>> From a strict POV we should just set cr3, flags and user_regs, but then >>>> Tim mentioned also honouring cr0/cr4, >>> >>> I understood his response to mean all fields, or none of them. >> >> Trying to make all those fields functional on PVH (or HVM) is quite >> useless IMHO, it's going to add more code that I doubt anyone is going >> to use when you can instead use the bare metal functions to set all >> those things (and from an OS point of view it's also more comfortable >> because you need less Xen specific stuff). > > That last part I certainly agree to, but that would apply to CR0 > and CR4 just as much. I've removed the usage of anything that's not strictly necessary in order to do AP bringup, so I've removed the setting of debugregs: --- >>From 1fa84464ca8b65860a21e4e3d9ac9646bfe5591b Mon Sep 17 00:00:00 2001 From: Roger Pau Monne Date: Thu, 14 Nov 2013 18:07:51 +0100 Subject: [PATCH v2] pvh: clearly specify used parameters in vcpu_guest_context MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The aim of this patch is to define a stable way in which PVH is going to do AP bringup. Since we are running inside of a HVM container, PVH should only need to set flags, cr3 and user_regs in order to bring up a vCPU, the rest can be set once the vCPU is started using the bare metal methods. Signed-off-by: Roger Pau Monné Cc: George Dunlap Cc: Mukesh Rathor Cc: Jan Beulich Cc: Tim Deegan Cc: Keir Fraser --- xen/arch/x86/domain.c | 24 +++++++++++------------- xen/arch/x86/hvm/vmx/vmx.c | 6 +----- xen/include/asm-x86/hvm/hvm.h | 6 +++--- xen/include/public/arch-x86/xen.h | 8 +++----- 4 files changed, 18 insertions(+), 26 deletions(-) diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index a3868f9..aa043a8 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -704,10 +704,16 @@ int arch_set_info_guest( /* PVH 32bitfixme */ ASSERT(!compat); - if ( c(ctrlreg[1]) || c(ldt_base) || c(ldt_ents) || - c(user_regs.cs) || c(user_regs.ss) || c(user_regs.es) || - c(user_regs.ds) || c(user_regs.fs) || c(user_regs.gs) || - c.nat->gdt_ents || c.nat->fs_base || c.nat->gs_base_user ) + if ( c(ctrlreg[0]) || c(ctrlreg[1]) || c(ctrlreg[2]) || + c(ctrlreg[4]) || c(ctrlreg[5]) || c(ctrlreg[6]) || + c(ctrlreg[7]) || c(debugreg[0]) || c(debugreg[1]) || + c(debugreg[2]) || c(debugreg[3]) || c(debugreg[4]) || + c(debugreg[5]) || c(debugreg[6]) || c(debugreg[7]) || + c(ldt_base) || c(ldt_ents) || c(user_regs.cs) || + c(user_regs.ss) || c(user_regs.es) || c(user_regs.ds) || + c(user_regs.fs) || c(user_regs.gs) || c(kernel_ss) || + c(kernel_sp) || c.nat->gs_base_kernel || c.nat->gdt_ents || + c.nat->fs_base || c.nat->gs_base_user ) return -EINVAL; } @@ -740,18 +746,10 @@ int arch_set_info_guest( XLAT_trap_info(v->arch.pv_vcpu.trap_ctxt + i, c.cmp->trap_ctxt + i); } - for ( i = 0; i < ARRAY_SIZE(v->arch.debugreg); ++i ) - v->arch.debugreg[i] = c(debugreg[i]); if ( has_hvm_container_vcpu(v) ) { - /* - * NB: TF_kernel_mode is set unconditionally for HVM guests, - * so we always use the gs_base_kernel here. If we change this - * function to imitate the PV functionality, we'll need to - * make it pay attention to the kernel bit. - */ - hvm_set_info_guest(v, compat ? 0 : c.nat->gs_base_kernel); + hvm_set_info_guest(v); if ( is_hvm_vcpu(v) || v->is_initialised ) goto out; diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index f0132a4..8d923e7 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -1467,7 +1467,7 @@ static int vmx_event_pending(struct vcpu *v) return intr_info & INTR_INFO_VALID_MASK; } -static void vmx_set_info_guest(struct vcpu *v, uint64_t gs_base_kernel) +static void vmx_set_info_guest(struct vcpu *v) { unsigned long intr_shadow; @@ -1492,10 +1492,6 @@ static void vmx_set_info_guest(struct vcpu *v, uint64_t gs_base_kernel) __vmwrite(GUEST_INTERRUPTIBILITY_INFO, intr_shadow); } - /* PVH 32bitfixme */ - if ( is_pvh_vcpu(v) ) - __vmwrite(GUEST_GS_BASE, gs_base_kernel); - vmx_vmcs_exit(v); } diff --git a/xen/include/asm-x86/hvm/hvm.h b/xen/include/asm-x86/hvm/hvm.h index a8ba06d..ccca5df 100644 --- a/xen/include/asm-x86/hvm/hvm.h +++ b/xen/include/asm-x86/hvm/hvm.h @@ -160,7 +160,7 @@ struct hvm_function_table { int (*msr_write_intercept)(unsigned int msr, uint64_t msr_content); void (*invlpg_intercept)(unsigned long vaddr); void (*handle_cd)(struct vcpu *v, unsigned long value); - void (*set_info_guest)(struct vcpu *v, uint64_t gs_base_kernel); + void (*set_info_guest)(struct vcpu *v); void (*set_rdtsc_exiting)(struct vcpu *v, bool_t); /* Nested HVM */ @@ -434,10 +434,10 @@ void *hvm_map_guest_frame_rw(unsigned long gfn, bool_t permanent); void *hvm_map_guest_frame_ro(unsigned long gfn, bool_t permanent); void hvm_unmap_guest_frame(void *p, bool_t permanent); -static inline void hvm_set_info_guest(struct vcpu *v, uint64_t gs_base_kernel) +static inline void hvm_set_info_guest(struct vcpu *v) { if ( hvm_funcs.set_info_guest ) - return hvm_funcs.set_info_guest(v, gs_base_kernel); + return hvm_funcs.set_info_guest(v); } int hvm_debug_op(struct vcpu *v, int32_t op); diff --git a/xen/include/public/arch-x86/xen.h b/xen/include/public/arch-x86/xen.h index 5d220ce..8c92308 100644 --- a/xen/include/public/arch-x86/xen.h +++ b/xen/include/public/arch-x86/xen.h @@ -159,12 +159,10 @@ typedef uint64_t tsc_timestamp_t; /* RDTSC timestamp */ * for HVM and PVH guests, not all information in this structure is updated: * * - For HVM guests, the structures read include: fpu_ctxt (if - * VGCT_I387_VALID is set), flags, user_regs, debugreg[*] + * VGCT_I387_VALID is set), flags and user_regs. * - * - PVH guests are the same as HVM guests, but additionally set cr3, - * and for 64-bit guests, gs_base_kernel. Additionally, the following - * entries must be 0: ctrlreg[1], ldt_base, ldt_ents, user_regs.{cs, - * ss, es, ds, fs, gs), gdt_ents, fs_base, and gs_base_user. + * - PVH guests are the same as HVM guests, but additionally use ctrlreg[3] to + * set cr3. All other fields not used should be set to 0. */ struct vcpu_guest_context { /* FPU registers come first so they can be aligned for FXSAVE/FXRSTOR. */ -- 1.7.7.5 (Apple Git-26) --------------010402080106080707090107 Content-Type: text/plain; charset="UTF-8"; x-mac-type=0; x-mac-creator=0; name="0001-pvh-clearly-specify-used-parameters-in-vcpu_guest_co.patch" Content-Transfer-Encoding: base64 Content-Disposition: attachment; filename*0="0001-pvh-clearly-specify-used-parameters-in-vcpu_guest_co.pa"; filename*1="tch" RnJvbSAxZmE4NDQ2NGNhOGI2NTg2MGEyMWU0ZTNkOWFjOTY0NmJmZTU1OTFiIE1vbiBTZXAg MTcgMDA6MDA6MDAgMjAwMQpGcm9tOiBSb2dlciBQYXUgTW9ubmUgPHJvZ2VyLnBhdUBjaXRy aXguY29tPgpEYXRlOiBUaHUsIDE0IE5vdiAyMDEzIDE4OjA3OjUxICswMTAwClN1YmplY3Q6 IFtQQVRDSCB2Ml0gcHZoOiBjbGVhcmx5IHNwZWNpZnkgdXNlZCBwYXJhbWV0ZXJzIGluCiB2 Y3B1X2d1ZXN0X2NvbnRleHQKTUlNRS1WZXJzaW9uOiAxLjAKQ29udGVudC1UeXBlOiB0ZXh0 L3BsYWluOyBjaGFyc2V0PVVURi04CkNvbnRlbnQtVHJhbnNmZXItRW5jb2Rpbmc6IDhiaXQK ClRoZSBhaW0gb2YgdGhpcyBwYXRjaCBpcyB0byBkZWZpbmUgYSBzdGFibGUgd2F5IGluIHdo aWNoIFBWSCBpcwpnb2luZyB0byBkbyBBUCBicmluZ3VwLgoKU2luY2Ugd2UgYXJlIHJ1bm5p bmcgaW5zaWRlIG9mIGEgSFZNIGNvbnRhaW5lciwgUFZIIHNob3VsZCBvbmx5IG5lZWQKdG8g c2V0IGZsYWdzLCBjcjMgYW5kIHVzZXJfcmVncyBpbiBvcmRlciB0byBicmluZyB1cCBhIHZD UFUsIHRoZSByZXN0CmNhbiBiZSBzZXQgb25jZSB0aGUgdkNQVSBpcyBzdGFydGVkIHVzaW5n IHRoZSBiYXJlIG1ldGFsIG1ldGhvZHMuCgpTaWduZWQtb2ZmLWJ5OiBSb2dlciBQYXUgTW9u bsOpIDxyb2dlci5wYXVAY2l0cml4LmNvbT4KQ2M6IEdlb3JnZSBEdW5sYXAgPGdlb3JnZS5k dW5sYXBAZXUuY2l0cml4LmNvbT4KQ2M6IE11a2VzaCBSYXRob3IgPG11a2VzaC5yYXRob3JA b3JhY2xlLmNvbT4KQ2M6IEphbiBCZXVsaWNoIDxKQmV1bGljaEBzdXNlLmNvbT4KQ2M6IFRp bSBEZWVnYW4gPHRpbUB4ZW4ub3JnPgpDYzogS2VpciBGcmFzZXIgPGtlaXJAeGVuLm9yZz4K LS0tCiB4ZW4vYXJjaC94ODYvZG9tYWluLmMgICAgICAgICAgICAgfCAgIDI0ICsrKysrKysr KysrLS0tLS0tLS0tLS0tLQogeGVuL2FyY2gveDg2L2h2bS92bXgvdm14LmMgICAgICAgIHwg ICAgNiArLS0tLS0KIHhlbi9pbmNsdWRlL2FzbS14ODYvaHZtL2h2bS5oICAgICB8ICAgIDYg KysrLS0tCiB4ZW4vaW5jbHVkZS9wdWJsaWMvYXJjaC14ODYveGVuLmggfCAgICA4ICsrKy0t LS0tCiA0IGZpbGVzIGNoYW5nZWQsIDE4IGluc2VydGlvbnMoKyksIDI2IGRlbGV0aW9ucygt KQoKZGlmZiAtLWdpdCBhL3hlbi9hcmNoL3g4Ni9kb21haW4uYyBiL3hlbi9hcmNoL3g4Ni9k b21haW4uYwppbmRleCBhMzg2OGY5Li5hYTA0M2E4IDEwMDY0NAotLS0gYS94ZW4vYXJjaC94 ODYvZG9tYWluLmMKKysrIGIveGVuL2FyY2gveDg2L2RvbWFpbi5jCkBAIC03MDQsMTAgKzcw NCwxNiBAQCBpbnQgYXJjaF9zZXRfaW5mb19ndWVzdCgKICAgICAgICAgLyogUFZIIDMyYml0 Zml4bWUgKi8KICAgICAgICAgQVNTRVJUKCFjb21wYXQpOwogCi0gICAgICAgIGlmICggYyhj dHJscmVnWzFdKSB8fCBjKGxkdF9iYXNlKSB8fCBjKGxkdF9lbnRzKSB8fAotICAgICAgICAg ICAgIGModXNlcl9yZWdzLmNzKSB8fCBjKHVzZXJfcmVncy5zcykgfHwgYyh1c2VyX3JlZ3Mu ZXMpIHx8Ci0gICAgICAgICAgICAgYyh1c2VyX3JlZ3MuZHMpIHx8IGModXNlcl9yZWdzLmZz KSB8fCBjKHVzZXJfcmVncy5ncykgfHwKLSAgICAgICAgICAgICBjLm5hdC0+Z2R0X2VudHMg fHwgYy5uYXQtPmZzX2Jhc2UgfHwgYy5uYXQtPmdzX2Jhc2VfdXNlciApCisgICAgICAgIGlm ICggYyhjdHJscmVnWzBdKSB8fCBjKGN0cmxyZWdbMV0pIHx8IGMoY3RybHJlZ1syXSkgfHwK KyAgICAgICAgICAgICBjKGN0cmxyZWdbNF0pIHx8IGMoY3RybHJlZ1s1XSkgfHwgYyhjdHJs cmVnWzZdKSB8fAorICAgICAgICAgICAgIGMoY3RybHJlZ1s3XSkgfHwgYyhkZWJ1Z3JlZ1sw XSkgfHwgYyhkZWJ1Z3JlZ1sxXSkgfHwKKyAgICAgICAgICAgICBjKGRlYnVncmVnWzJdKSB8 fCBjKGRlYnVncmVnWzNdKSB8fCBjKGRlYnVncmVnWzRdKSB8fAorICAgICAgICAgICAgIGMo ZGVidWdyZWdbNV0pIHx8IGMoZGVidWdyZWdbNl0pIHx8IGMoZGVidWdyZWdbN10pIHx8Cisg ICAgICAgICAgICAgYyhsZHRfYmFzZSkgfHwgYyhsZHRfZW50cykgfHwgYyh1c2VyX3JlZ3Mu Y3MpIHx8CisgICAgICAgICAgICAgYyh1c2VyX3JlZ3Muc3MpIHx8IGModXNlcl9yZWdzLmVz KSB8fCBjKHVzZXJfcmVncy5kcykgfHwKKyAgICAgICAgICAgICBjKHVzZXJfcmVncy5mcykg fHwgYyh1c2VyX3JlZ3MuZ3MpIHx8IGMoa2VybmVsX3NzKSB8fAorICAgICAgICAgICAgIGMo a2VybmVsX3NwKSB8fCBjLm5hdC0+Z3NfYmFzZV9rZXJuZWwgfHwgYy5uYXQtPmdkdF9lbnRz IHx8CisgICAgICAgICAgICAgYy5uYXQtPmZzX2Jhc2UgfHwgYy5uYXQtPmdzX2Jhc2VfdXNl ciApCiAgICAgICAgICAgICByZXR1cm4gLUVJTlZBTDsKICAgICB9CiAKQEAgLTc0MCwxOCAr NzQ2LDEwIEBAIGludCBhcmNoX3NldF9pbmZvX2d1ZXN0KAogICAgICAgICAgICAgWExBVF90 cmFwX2luZm8odi0+YXJjaC5wdl92Y3B1LnRyYXBfY3R4dCArIGksCiAgICAgICAgICAgICAg ICAgICAgICAgICAgICBjLmNtcC0+dHJhcF9jdHh0ICsgaSk7CiAgICAgfQotICAgIGZvciAo IGkgPSAwOyBpIDwgQVJSQVlfU0laRSh2LT5hcmNoLmRlYnVncmVnKTsgKytpICkKLSAgICAg ICAgdi0+YXJjaC5kZWJ1Z3JlZ1tpXSA9IGMoZGVidWdyZWdbaV0pOwogCiAgICAgaWYgKCBo YXNfaHZtX2NvbnRhaW5lcl92Y3B1KHYpICkKICAgICB7Ci0gICAgICAgIC8qCi0gICAgICAg ICAqIE5COiBURl9rZXJuZWxfbW9kZSBpcyBzZXQgdW5jb25kaXRpb25hbGx5IGZvciBIVk0g Z3Vlc3RzLAotICAgICAgICAgKiBzbyB3ZSBhbHdheXMgdXNlIHRoZSBnc19iYXNlX2tlcm5l bCBoZXJlLiBJZiB3ZSBjaGFuZ2UgdGhpcwotICAgICAgICAgKiBmdW5jdGlvbiB0byBpbWl0 YXRlIHRoZSBQViBmdW5jdGlvbmFsaXR5LCB3ZSdsbCBuZWVkIHRvCi0gICAgICAgICAqIG1h a2UgaXQgcGF5IGF0dGVudGlvbiB0byB0aGUga2VybmVsIGJpdC4KLSAgICAgICAgICovCi0g ICAgICAgIGh2bV9zZXRfaW5mb19ndWVzdCh2LCBjb21wYXQgPyAwIDogYy5uYXQtPmdzX2Jh c2Vfa2VybmVsKTsKKyAgICAgICAgaHZtX3NldF9pbmZvX2d1ZXN0KHYpOwogCiAgICAgICAg IGlmICggaXNfaHZtX3ZjcHUodikgfHwgdi0+aXNfaW5pdGlhbGlzZWQgKQogICAgICAgICAg ICAgZ290byBvdXQ7CmRpZmYgLS1naXQgYS94ZW4vYXJjaC94ODYvaHZtL3ZteC92bXguYyBi L3hlbi9hcmNoL3g4Ni9odm0vdm14L3ZteC5jCmluZGV4IGYwMTMyYTQuLjhkOTIzZTcgMTAw NjQ0Ci0tLSBhL3hlbi9hcmNoL3g4Ni9odm0vdm14L3ZteC5jCisrKyBiL3hlbi9hcmNoL3g4 Ni9odm0vdm14L3ZteC5jCkBAIC0xNDY3LDcgKzE0NjcsNyBAQCBzdGF0aWMgaW50IHZteF9l dmVudF9wZW5kaW5nKHN0cnVjdCB2Y3B1ICp2KQogICAgIHJldHVybiBpbnRyX2luZm8gJiBJ TlRSX0lORk9fVkFMSURfTUFTSzsKIH0KIAotc3RhdGljIHZvaWQgdm14X3NldF9pbmZvX2d1 ZXN0KHN0cnVjdCB2Y3B1ICp2LCB1aW50NjRfdCBnc19iYXNlX2tlcm5lbCkKK3N0YXRpYyB2 b2lkIHZteF9zZXRfaW5mb19ndWVzdChzdHJ1Y3QgdmNwdSAqdikKIHsKICAgICB1bnNpZ25l ZCBsb25nIGludHJfc2hhZG93OwogCkBAIC0xNDkyLDEwICsxNDkyLDYgQEAgc3RhdGljIHZv aWQgdm14X3NldF9pbmZvX2d1ZXN0KHN0cnVjdCB2Y3B1ICp2LCB1aW50NjRfdCBnc19iYXNl X2tlcm5lbCkKICAgICAgICAgX192bXdyaXRlKEdVRVNUX0lOVEVSUlVQVElCSUxJVFlfSU5G TywgaW50cl9zaGFkb3cpOwogICAgIH0KIAotICAgIC8qIFBWSCAzMmJpdGZpeG1lICovCi0g ICAgaWYgKCBpc19wdmhfdmNwdSh2KSApCi0gICAgICAgIF9fdm13cml0ZShHVUVTVF9HU19C QVNFLCBnc19iYXNlX2tlcm5lbCk7Ci0KICAgICB2bXhfdm1jc19leGl0KHYpOwogfQogCmRp ZmYgLS1naXQgYS94ZW4vaW5jbHVkZS9hc20teDg2L2h2bS9odm0uaCBiL3hlbi9pbmNsdWRl L2FzbS14ODYvaHZtL2h2bS5oCmluZGV4IGE4YmEwNmQuLmNjY2E1ZGYgMTAwNjQ0Ci0tLSBh L3hlbi9pbmNsdWRlL2FzbS14ODYvaHZtL2h2bS5oCisrKyBiL3hlbi9pbmNsdWRlL2FzbS14 ODYvaHZtL2h2bS5oCkBAIC0xNjAsNyArMTYwLDcgQEAgc3RydWN0IGh2bV9mdW5jdGlvbl90 YWJsZSB7CiAgICAgaW50ICgqbXNyX3dyaXRlX2ludGVyY2VwdCkodW5zaWduZWQgaW50IG1z ciwgdWludDY0X3QgbXNyX2NvbnRlbnQpOwogICAgIHZvaWQgKCppbnZscGdfaW50ZXJjZXB0 KSh1bnNpZ25lZCBsb25nIHZhZGRyKTsKICAgICB2b2lkICgqaGFuZGxlX2NkKShzdHJ1Y3Qg dmNwdSAqdiwgdW5zaWduZWQgbG9uZyB2YWx1ZSk7Ci0gICAgdm9pZCAoKnNldF9pbmZvX2d1 ZXN0KShzdHJ1Y3QgdmNwdSAqdiwgdWludDY0X3QgZ3NfYmFzZV9rZXJuZWwpOworICAgIHZv aWQgKCpzZXRfaW5mb19ndWVzdCkoc3RydWN0IHZjcHUgKnYpOwogICAgIHZvaWQgKCpzZXRf cmR0c2NfZXhpdGluZykoc3RydWN0IHZjcHUgKnYsIGJvb2xfdCk7CiAKICAgICAvKiBOZXN0 ZWQgSFZNICovCkBAIC00MzQsMTAgKzQzNCwxMCBAQCB2b2lkICpodm1fbWFwX2d1ZXN0X2Zy YW1lX3J3KHVuc2lnbmVkIGxvbmcgZ2ZuLCBib29sX3QgcGVybWFuZW50KTsKIHZvaWQgKmh2 bV9tYXBfZ3Vlc3RfZnJhbWVfcm8odW5zaWduZWQgbG9uZyBnZm4sIGJvb2xfdCBwZXJtYW5l bnQpOwogdm9pZCBodm1fdW5tYXBfZ3Vlc3RfZnJhbWUodm9pZCAqcCwgYm9vbF90IHBlcm1h bmVudCk7CiAKLXN0YXRpYyBpbmxpbmUgdm9pZCBodm1fc2V0X2luZm9fZ3Vlc3Qoc3RydWN0 IHZjcHUgKnYsIHVpbnQ2NF90IGdzX2Jhc2Vfa2VybmVsKQorc3RhdGljIGlubGluZSB2b2lk IGh2bV9zZXRfaW5mb19ndWVzdChzdHJ1Y3QgdmNwdSAqdikKIHsKICAgICBpZiAoIGh2bV9m dW5jcy5zZXRfaW5mb19ndWVzdCApCi0gICAgICAgIHJldHVybiBodm1fZnVuY3Muc2V0X2lu Zm9fZ3Vlc3QodiwgZ3NfYmFzZV9rZXJuZWwpOworICAgICAgICByZXR1cm4gaHZtX2Z1bmNz LnNldF9pbmZvX2d1ZXN0KHYpOwogfQogCiBpbnQgaHZtX2RlYnVnX29wKHN0cnVjdCB2Y3B1 ICp2LCBpbnQzMl90IG9wKTsKZGlmZiAtLWdpdCBhL3hlbi9pbmNsdWRlL3B1YmxpYy9hcmNo LXg4Ni94ZW4uaCBiL3hlbi9pbmNsdWRlL3B1YmxpYy9hcmNoLXg4Ni94ZW4uaAppbmRleCA1 ZDIyMGNlLi44YzkyMzA4IDEwMDY0NAotLS0gYS94ZW4vaW5jbHVkZS9wdWJsaWMvYXJjaC14 ODYveGVuLmgKKysrIGIveGVuL2luY2x1ZGUvcHVibGljL2FyY2gteDg2L3hlbi5oCkBAIC0x NTksMTIgKzE1OSwxMCBAQCB0eXBlZGVmIHVpbnQ2NF90IHRzY190aW1lc3RhbXBfdDsgLyog UkRUU0MgdGltZXN0YW1wICovCiAgKiBmb3IgSFZNIGFuZCBQVkggZ3Vlc3RzLCBub3QgYWxs IGluZm9ybWF0aW9uIGluIHRoaXMgc3RydWN0dXJlIGlzIHVwZGF0ZWQ6CiAgKgogICogLSBG b3IgSFZNIGd1ZXN0cywgdGhlIHN0cnVjdHVyZXMgcmVhZCBpbmNsdWRlOiBmcHVfY3R4dCAo aWYKLSAqIFZHQ1RfSTM4N19WQUxJRCBpcyBzZXQpLCBmbGFncywgdXNlcl9yZWdzLCBkZWJ1 Z3JlZ1sqXQorICogVkdDVF9JMzg3X1ZBTElEIGlzIHNldCksIGZsYWdzIGFuZCB1c2VyX3Jl Z3MuCiAgKgotICogLSBQVkggZ3Vlc3RzIGFyZSB0aGUgc2FtZSBhcyBIVk0gZ3Vlc3RzLCBi dXQgYWRkaXRpb25hbGx5IHNldCBjcjMsCi0gKiBhbmQgZm9yIDY0LWJpdCBndWVzdHMsIGdz X2Jhc2Vfa2VybmVsLiAgQWRkaXRpb25hbGx5LCB0aGUgZm9sbG93aW5nCi0gKiBlbnRyaWVz IG11c3QgYmUgMDogY3RybHJlZ1sxXSwgbGR0X2Jhc2UsIGxkdF9lbnRzLCB1c2VyX3JlZ3Mu e2NzLAotICogc3MsIGVzLCBkcywgZnMsIGdzKSwgZ2R0X2VudHMsIGZzX2Jhc2UsIGFuZCBn c19iYXNlX3VzZXIuCisgKiAtIFBWSCBndWVzdHMgYXJlIHRoZSBzYW1lIGFzIEhWTSBndWVz dHMsIGJ1dCBhZGRpdGlvbmFsbHkgdXNlIGN0cmxyZWdbM10gdG8KKyAqIHNldCBjcjMuIEFs bCBvdGhlciBmaWVsZHMgbm90IHVzZWQgc2hvdWxkIGJlIHNldCB0byAwLgogICovCiBzdHJ1 Y3QgdmNwdV9ndWVzdF9jb250ZXh0IHsKICAgICAvKiBGUFUgcmVnaXN0ZXJzIGNvbWUgZmly c3Qgc28gdGhleSBjYW4gYmUgYWxpZ25lZCBmb3IgRlhTQVZFL0ZYUlNUT1IuICovCi0tIAox LjcuNy41IChBcHBsZSBHaXQtMjYpCgo= --------------010402080106080707090107 Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel --------------010402080106080707090107--