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From: George Dunlap <george.dunlap@eu.citrix.com>
To: Aravind Gopalakrishnan <aravind.gopalakrishnan@amd.com>,
	Jan Beulich <JBeulich@suse.com>,
	xen-devel@lists.xen.org
Cc: Thomas Lendacky <Thomas.Lendacky@amd.com>,
	Andrew Cooper <andrew.cooper3@citrix.com>,
	shurd@broadcom.com,
	Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>,
	Sherry Hurwitz <sherry.hurwitz@amd.com>
Subject: Re: [PATCH V8] ns16550: Add support for UART present in Broadcom TruManage capable NetXtreme chips
Date: Fri, 6 Dec 2013 16:00:44 +0000	[thread overview]
Message-ID: <52A1F4AC.6020506@eu.citrix.com> (raw)
In-Reply-To: <52A1F2B9.2070504@amd.com>

On 12/06/2013 03:52 PM, Aravind Gopalakrishnan wrote:
> On 12/6/2013 2:41 AM, Jan Beulich wrote:
>>>>> On 05.12.13 at 23:38, Aravind Gopalakrishnan 
>>>>> <Aravind.Gopalakrishnan@amd.com> wrote:
>>> Since it is an MMIO device, the code has been modified to accept 
>>> MMIO based
>>> devices as well. MMIO device settings are populated in the 
>>> 'uart_config'
>>> table.
>>> It also advertises 64 bit BAR. Therefore, code is reworked to 
>>> account for 64
>>> bit BAR and 64 bit MMIO lengths.
>>>
>>> Some more quirks are - the need to shift the register offset by a 
>>> specific
>>> value and we also need to verify (UART_LSR_THRE && UART_LSR_TEMT) 
>>> bits before
>>> transmitting data.
>>>
>>> While testing, include com1=115200,8n1,pci,0 on the xen cmdline to 
>>> observe
>>> output on console using SoL.
>>>
>>> Changes from V7:
>>>    - per Jan's comments:
>>>      - Moving pci_ro_device to ns16550_init_postirq() so that either
>>>        one of pci_hide_device or pci_ro_device is done at one place
>>>      - remove leading '0' from printk as absent segment identifier
>>>        implies zero anyway.
>>>    - per Ian's comments:
>>>      - fixed issues that casued his build to fail.
>>>      - cross-compiled for arm32 and arm64 after applying patch and
>>>        build was successful on local machine.
>>>
>>> Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
>>> Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
>>> Signed-off-by: Thomas Lendacky <Thomas.Lendacky@amd.com>
>> I'm fine with this now, but I take it that you're not intending this
>> to go into 4.4, or else you'd have Cc-ed George explaining why
>> a freeze exception is being requested.
>>
>>
> Thanks Jan,
>
> (Now cc-ing George..)
> Please do consider this patch for 4.4 as it is a customer request for 
> the AMD Open Compute project.

Can you take a look at the guidelines linked below, think about the 
questions there, and then give a brief summary of the benefits and 
potential risks?

http://wiki.xen.org/wiki/Xen_Roadmap/4.4#Exception_guidelines_for_after_the_code_freeze

Thanks,
  -George

  reply	other threads:[~2013-12-06 16:00 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-12-05 22:38 [PATCH V8] ns16550: Add support for UART present in Broadcom TruManage capable NetXtreme chips Aravind Gopalakrishnan
2013-12-06  8:41 ` Jan Beulich
2013-12-06 15:52   ` Aravind Gopalakrishnan
2013-12-06 16:00     ` George Dunlap [this message]
2013-12-06 20:31       ` Aravind Gopalakrishnan
2013-12-09  8:22         ` Jan Beulich
2013-12-16 14:29           ` Andrew Cooper
2014-02-24 16:12             ` Aravind Gopalakrishnan
2014-02-24 16:26               ` Jan Beulich
2014-02-24 18:08                 ` Aravind Gopalakrishnan
2014-02-25  7:53                   ` Jan Beulich

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