From mboxrd@z Thu Jan 1 00:00:00 1970 From: Julien Grall Subject: Re: [PATCH-4.5 3/4] xen/arm: do not request maintenance_interrupts Date: Fri, 07 Feb 2014 23:10:03 +0000 Message-ID: <52F567CB.7080302@linaro.org> References: <1391799378-31664-3-git-send-email-stefano.stabellini@eu.citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1391799378-31664-3-git-send-email-stefano.stabellini@eu.citrix.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Stefano Stabellini , xen-devel@lists.xensource.com Cc: julien.grall@citrix.com, Ian.Campbell@citrix.com List-Id: xen-devel@lists.xenproject.org On 07/02/14 18:56, Stefano Stabellini wrote: > +static void gic_clear_lrs(struct vcpu *v) > +{ > + struct pending_irq *p; > + int i = 0, irq; > + uint32_t lr; > + bool_t inflight; > + > + ASSERT(!local_irq_is_enabled()); > + > + while ((i = find_next_bit((const long unsigned int *) &this_cpu(lr_mask), > + nr_lrs, i)) < nr_lrs) { Did you look at to ELRSR{0,1} registers which list the usable LRs? I think you can use it with the this_cpu(lr_mask) to avoid browsing every LRs. -- Julien Grall