From mboxrd@z Thu Jan 1 00:00:00 1970 From: Julien Grall Subject: Re: [PATCH-4.5 0/4] remove maintenance interrupts Date: Fri, 07 Feb 2014 23:22:19 +0000 Message-ID: <52F56AAB.7080300@linaro.org> References: Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Stefano Stabellini , xen-devel@lists.xensource.com Cc: Julien Grall , Ian Campbell List-Id: xen-devel@lists.xenproject.org On 07/02/14 18:56, Stefano Stabellini wrote: > Hi all, Hi Stefano, > this patch series removes any needs for maintenance interrupts for both > hardware and software interrupts in Xen. > It achieves the goal by using the GICH_LR_HW bit for hardware interrupts > and by checking the status of the GICH_LR registers on return to guest, > clearing the registers that are invalid and handling the lifecycle of > the corresponding interrupts in Xen data structures. After reading your patch series I see a possible race condition with the timer interrupt. As you know, Xen can re-inject the timer interrupt before the previous one is EOIed. As it's the timer, the IRQ is injected on the current running VCPU. vgic_vcpu_inject_irq(timer) -> IRQ already visible to the guest -> set PENDING return to guest context <--------------------- Guest EOI the IRQ .... few milleseconds going to hyp mode -> doing stuff -> reinject the timer IRQ If I'm not mistaken, with your solution, the next IRQ can be delayed for few milliseconds. That could be fixed by updating the Lrs. -- Julien Grall