From mboxrd@z Thu Jan  1 00:00:00 1970
From: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Subject: Re: VM Feature levelling improvements proposal (draft C)
Date: Tue, 18 Feb 2014 13:57:30 -0500
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To: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: Keir Fraser <keir@xen.org>, Jun Nakajima <jun.nakajima@intel.com>, Tim Deegan <tim@xen.org>, Xen-devel List <xen-devel@lists.xen.org>, Jan Beulich <JBeulich@suse.com>, SuraveeSuthikulpanit <suravee.suthikulpanit@amd.com>, "xiantao.zhang@intel.com" <xiantao.zhang@intel.com>
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On 02/18/2014 12:57 PM, Andrew Cooper wrote:
> AMD has the CPUID override MSRs 0xc001100{4,5} which cover the basic and
> extended feature leaves.  Are there any MSRs to cover
> CPUID.0000_000D[ecx=1].eax which contains the 'XSAVEOPT' bit, or
> CPUID.0000_0007[ecx=1].ebx which is the "structured extended" feature
> map?  I cant find any reference to new override MSRs in the manuals (or
> with google), or to having cpuid faulting support like Intel cpus.


Re: XSAVEOPT --- there is a bit for XSAVE (MSRC001_1004[58]). And since 
you can't use XSAVEOPT without XSAVE (you use the latter to initialize 
the save area) I think using this bit would be sufficient.


-boris