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From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: xen-devel <xen-devel@lists.xenproject.org>,
	Keir Fraser <keir@xen.org>,
	Donald D Dugger <donald.d.dugger@intel.com>,
	Jun Nakajima <jun.nakajima@intel.com>
Subject: Re: [PATCH] x86/Intel: work around Xeon 7400 series erratum AAI65
Date: Wed, 5 Mar 2014 17:19:47 +0000	[thread overview]
Message-ID: <53175CB3.3070907@citrix.com> (raw)
In-Reply-To: <53176474020000780012146F@nat28.tlf.novell.com>


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On 05/03/14 16:52, Jan Beulich wrote:
> Linux commit 40e2d7f9b5dae048789c64672bf3027fbb663ffa ("x86 idle:
> Repair large-server 50-watt idle-power regression") tells us that this
> applie snot just to the named Xen 7400 series, but also NHM-EX and

"applies not" "named Xeon 7400 series"

> WSM-EX; sadly Intel's documentation is so badly searchable that I
> wasn't able to locate the respective errata (and hence can't quote
> their numbers here).
>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>

content Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>

>
> --- a/xen/arch/x86/acpi/cpu_idle.c
> +++ b/xen/arch/x86/acpi/cpu_idle.c
> @@ -335,6 +335,9 @@ void mwait_idle_with_hints(unsigned int 
>      unsigned int cpu = smp_processor_id();
>      s_time_t expires = per_cpu(timer_deadline, cpu);
>  
> +    if ( boot_cpu_has(X86_FEATURE_CLFLUSH_MONITOR) )
> +        clflush((void *)&mwait_wakeup(cpu));
> +
>      __monitor((void *)&mwait_wakeup(cpu), 0, 0);
>      smp_mb();
>  
> --- a/xen/arch/x86/cpu/intel.c
> +++ b/xen/arch/x86/cpu/intel.c
> @@ -147,6 +147,9 @@ void __devinit early_intel_workaround(st
>  /*
>   * P4 Xeon errata 037 workaround.
>   * Hardware prefetcher may cause stale data to be loaded into the cache.
> + *
> + * Xeon 7400 erratum AAI65 (and further newer Xeons)
> + * MONITOR/MWAIT may have excessive false wakeups
>   */
>  static void __devinit Intel_errata_workarounds(struct cpuinfo_x86 *c)
>  {
> @@ -161,6 +164,10 @@ static void __devinit Intel_errata_worka
>  			wrmsr (MSR_IA32_MISC_ENABLE, lo, hi);
>  		}
>  	}
> +
> +	if (c->x86 == 6 && cpu_has_clflush &&
> +	    (c->x86_model == 29 || c->x86_model == 46 || c->x86_model == 47))
> +		set_bit(X86_FEATURE_CLFLUSH_MONITOR, c->x86_capability);
>  }
>  
>  
> --- a/xen/include/asm-x86/cpufeature.h
> +++ b/xen/include/asm-x86/cpufeature.h
> @@ -71,6 +71,7 @@
>  #define X86_FEATURE_TSC_RELIABLE (3*32+12) /* TSC is known to be reliable */
>  #define X86_FEATURE_XTOPOLOGY    (3*32+13) /* cpu topology enum extensions */
>  #define X86_FEATURE_CPUID_FAULTING (3*32+14) /* cpuid faulting */
> +#define X86_FEATURE_CLFLUSH_MONITOR (3*32+15) /* clflush reqd with monitor */
>  
>  /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
>  #define X86_FEATURE_XMM3	(4*32+ 0) /* Streaming SIMD Extensions-3 */
>
>
>
>
>
> _______________________________________________
> Xen-devel mailing list
> Xen-devel@lists.xen.org
> http://lists.xen.org/xen-devel


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  parent reply	other threads:[~2014-03-05 17:20 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-03-05 16:52 [PATCH] x86/Intel: work around Xeon 7400 series erratum AAI65 Jan Beulich
2014-03-05 17:08 ` Pasi Kärkkäinen
2014-03-06  9:38   ` Jan Beulich
2014-03-05 17:19 ` Andrew Cooper [this message]
2014-03-12  9:40 ` Ping: " Jan Beulich
2014-03-17 12:57   ` Tian, Kevin

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