From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Cooper Subject: Re: [PATCH v1 1/2] xen/arm: Introduce clean_and_invalidate_xen_dcache() macro Date: Thu, 6 Mar 2014 14:09:01 +0000 Message-ID: <5318817D.5000400@citrix.com> References: <1394113851-17321-1-git-send-email-oleksandr.tyshchenko@globallogic.com> <1394113851-17321-2-git-send-email-oleksandr.tyshchenko@globallogic.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1394113851-17321-2-git-send-email-oleksandr.tyshchenko@globallogic.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Oleksandr Tyshchenko Cc: julien.grall@linaro.org, tim@xen.org, ian.campbell@citrix.com, stefano.stabellini@eu.citrix.com, xen-devel@lists.xen.org List-Id: xen-devel@lists.xenproject.org On 06/03/14 13:50, Oleksandr Tyshchenko wrote: > This macro is very similar to clean_xen_dcache(), but it performs > clean and invalidate dcache. > > Signed-off-by: Julien Grall > Signed-off-by: Ian Campbell > Signed-off-by: Oleksandr Tyshchenko > --- > xen/include/asm-arm/page.h | 26 ++++++++++++++++++++++++-- > 1 file changed, 24 insertions(+), 2 deletions(-) > > diff --git a/xen/include/asm-arm/page.h b/xen/include/asm-arm/page.h > index e00be9e..34effa1 100644 > --- a/xen/include/asm-arm/page.h > +++ b/xen/include/asm-arm/page.h > @@ -226,7 +226,7 @@ static inline lpae_t mfn_to_xen_entry(unsigned long mfn) > /* Actual cacheline size on the boot CPU. */ > extern size_t cacheline_bytes; > > -/* Function for flushing medium-sized areas. > +/* Functions for flushing medium-sized areas. > * if 'range' is large enough we might want to use model-specific > * full-cache flushes. */ > static inline void clean_xen_dcache_va_range(void *p, unsigned long size) > @@ -238,7 +238,17 @@ static inline void clean_xen_dcache_va_range(void *p, unsigned long size) > dsb(); /* So we know the flushes happen before continuing */ > } > > -/* Macro for flushing a single small item. The predicate is always > +static inline void clean_and_invalidate_xen_dcache_va_range(void *p, >>From a style point of view, this would be better if void *p was on the next line and indented once > + unsigned long size) > +{ > + void *end; Newline here, as per CODING_STYLE in the Xen root. ~Andrew > + dsb(); /* So the CPU issues all writes to the range */ > + for ( end = p + size; p < end; p += cacheline_bytes ) > + asm volatile (__clean_and_invalidate_xen_dcache_one(0) : : "r" (p)); > + dsb(); /* So we know the flushes happen before continuing */ > +} > + > +/* Macros for flushing a single small item. The predicate is always > * compile-time constant so this will compile down to 3 instructions in > * the common case. */ > #define clean_xen_dcache(x) do { \ > @@ -253,6 +263,18 @@ static inline void clean_xen_dcache_va_range(void *p, unsigned long size) > : : "r" (_p), "m" (*_p)); \ > } while (0) > > +#define clean_and_invalidate_xen_dcache(x) do { \ > + typeof(x) *_p = &(x); \ > + if ( sizeof(x) > MIN_CACHELINE_BYTES || sizeof(x) > alignof(x) ) \ > + clean_and_invalidate_xen_dcache_va_range(_p, sizeof(x)); \ > + else \ > + asm volatile ( \ > + "dsb sy;" /* Finish all earlier writes */ \ > + __clean_and_invalidate_xen_dcache_one(0) \ > + "dsb sy;" /* Finish flush before continuing */ \ > + : : "r" (_p), "m" (*_p)); \ > +} while (0) > + > /* Flush the dcache for an entire page. */ > void flush_page_to_ram(unsigned long mfn); >