From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Cooper Subject: Re: [PATCH v2 1/3] x86/AMD: feature masking is unavailable on Fam11 Date: Mon, 7 Apr 2014 11:14:32 +0100 Message-ID: <53427A88.70608@citrix.com> References: <53428DCC020000780000607D@nat28.tlf.novell.com> <53428EFB02000078000060B7@nat28.tlf.novell.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============7835042421292565740==" Return-path: Received: from mail6.bemta14.messagelabs.com ([193.109.254.103]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1WX6ZY-0000XO-V9 for xen-devel@lists.xenproject.org; Mon, 07 Apr 2014 10:14:37 +0000 In-Reply-To: <53428EFB02000078000060B7@nat28.tlf.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Jan Beulich Cc: xen-devel , Keir Fraser , Aravind Gopalakrishnan , suravee.suthikulpanit@amd.com List-Id: xen-devel@lists.xenproject.org --===============7835042421292565740== Content-Type: multipart/alternative; boundary="------------030603080502080907040505" --------------030603080502080907040505 Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit On 07/04/14 10:41, Jan Beulich wrote: > Reported-by: Aravind Gopalakrishnan > Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper > > --- a/xen/arch/x86/cpu/amd.c > +++ b/xen/arch/x86/cpu/amd.c > @@ -107,6 +107,10 @@ static void __devinit set_cpuidmask(cons > ASSERT((status == not_parsed) && (smp_processor_id() == 0)); > status = no_mask; > > + /* Fam11 doesn't support masking at all. */ > + if (c->x86 == 0x11) > + return; > + > if (~(opt_cpuid_mask_ecx & opt_cpuid_mask_edx & > opt_cpuid_mask_ext_ecx & opt_cpuid_mask_ext_edx)) { > feat_ecx = opt_cpuid_mask_ecx; > @@ -176,7 +180,6 @@ static void __devinit set_cpuidmask(cons > extfeat_ecx, extfeat_edx); > > setmask: > - /* FIXME check if processor supports CPUID masking */ > /* AMD processors prior to family 10h required a 32-bit password */ > if (c->x86 >= 0x10) { > wrmsr(MSR_K8_FEATURE_MASK, feat_edx, feat_ecx); > > > > > > _______________________________________________ > Xen-devel mailing list > Xen-devel@lists.xen.org > http://lists.xen.org/xen-devel --------------030603080502080907040505 Content-Type: text/html; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit
On 07/04/14 10:41, Jan Beulich wrote:
Reported-by: Aravind Gopalakrishnan<aravind.gopalakrishnan@amd.com>
Signed-off-by: Jan Beulich <jbeulich@suse.com>

Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>


--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -107,6 +107,10 @@ static void __devinit set_cpuidmask(cons
 	ASSERT((status == not_parsed) && (smp_processor_id() == 0));
 	status = no_mask;
 
+	/* Fam11 doesn't support masking at all. */
+	if (c->x86 == 0x11)
+		return;
+
 	if (~(opt_cpuid_mask_ecx & opt_cpuid_mask_edx &
 	      opt_cpuid_mask_ext_ecx & opt_cpuid_mask_ext_edx)) {
 		feat_ecx = opt_cpuid_mask_ecx;
@@ -176,7 +180,6 @@ static void __devinit set_cpuidmask(cons
 	       extfeat_ecx, extfeat_edx);
 
  setmask:
-	/* FIXME check if processor supports CPUID masking */
 	/* AMD processors prior to family 10h required a 32-bit password */
 	if (c->x86 >= 0x10) {
 		wrmsr(MSR_K8_FEATURE_MASK, feat_edx, feat_ecx);






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