From mboxrd@z Thu Jan 1 00:00:00 1970 From: Boris Ostrovsky Subject: Re: [PATCH v2 2/3] x86/AMD: support further feature masking MSRs Date: Mon, 07 Apr 2014 11:21:48 -0400 Message-ID: <5342C28C.2090809@oracle.com> References: <53428DCC020000780000607D@nat28.tlf.novell.com> <53428F4402000078000060BB@nat28.tlf.novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1WXBJx-00036Z-R6 for xen-devel@lists.xenproject.org; Mon, 07 Apr 2014 15:18:51 +0000 In-Reply-To: <53428F4402000078000060BB@nat28.tlf.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Jan Beulich Cc: xen-devel , Keir Fraser , Aravind Gopalakrishnan , suravee.suthikulpanit@amd.com List-Id: xen-devel@lists.xenproject.org On 04/07/2014 05:43 AM, Jan Beulich wrote: @@ -179,11 +196,39 @@ static void __devinit set_cpuidmask(cons printk("Writing CPUID extended feature mask ECX:EDX -> %08Xh:%08Xh\n", extfeat_ecx, extfeat_edx); + if (c->cpuid_level >= 7) + cpuid_count(7, 0, &eax, &ebx, &ecx, &edx); + else + ebx = eax = 0; + if ((eax | ebx) && ~(l7s0_eax & l7s0_ebx)) { + if (l7s0_eax > eax) + l7s0_eax = eax; + l7s0_ebx &= ebx; Can you explain why eax is treated differently here (i.e. not ANDing it as is done with ebx)? -boris