Re: [PATCH v2 13/15] xen/arm: Add support for GIC v3

[Julien Grall <julien.grall@linaro.org>]

On 04/10/2014 11:00 AM, Ian Campbell wrote:
> On Fri, 2014-04-04 at 17:26 +0530, vijay.kilari@gmail.com wrote:
> 
>> +#define gic_data_rdist_rd_base()        (this_cpu(rbase))
>> +#define gic_data_rdist_sgi_base()       (gic_data_rdist_rd_base() + SZ_64K)
> 
> Macros should be SHOUTY and ideally a lot shorter.
> 
> Since we have GICD[...] etc how about GICR[...]? And for the SGI bit
> just use GICR[GICR_SGI_...] (where GICR_SGI_ is 64K).
> 
>> +
>> +static inline u64 read_cpuid_mpidr(void)
>> +{
>> +   return READ_SYSREG(MPIDR_EL1);
>> +}
> 
> No need for this trivial wrapper.

As said on V1:
MPDIR_EL1 is already replicated in current_cpu_data.mpidr.bits

>> +static void __init gic_dist_init(void)
>> +{
>> +    uint32_t type;
>> +    u64 affinity;
>> +    int i;
>> +
>> +    /* Disable the distributor */
>> +    writel_relaxed(0, GICD + GICD_CTLR);
> 
> Does using readl/writel_relaxed buy you anything over using a GICD macro
> with a volatile in it like the v2 code does?

As ioremap is used to map the GIC MMIO, IHMO it's better to use
readl/writel_relaxed to be consistent.

Regards,

-- 
Julien Grall