From mboxrd@z Thu Jan 1 00:00:00 1970 From: Julien Grall Subject: Re: [PATCH v3 13/16] xen/arm: Add support for GIC v3 Date: Thu, 17 Apr 2014 10:57:38 +0100 Message-ID: <534FA592.7060802@linaro.org> References: <1397560675-29861-1-git-send-email-vijay.kilari@gmail.com> <1397560675-29861-14-git-send-email-vijay.kilari@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1397560675-29861-14-git-send-email-vijay.kilari@gmail.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: vijay.kilari@gmail.com Cc: Ian.Campbell@citrix.com, stefano.stabellini@eu.citrix.com, Prasun.Kapoor@caviumnetworks.com, vijaya.kumar@caviumnetworks.com, xen-devel@lists.xen.org, stefano.stabellini@citrix.com List-Id: xen-devel@lists.xenproject.org On 04/15/2014 12:17 PM, vijay.kilari@gmail.com wrote: > +#define GICD_CTLR (0x000) > +#define GICD_TYPER (0x004) > +#define GICD_IIDR (0x008) > +#define GICD_STATUSR (0x010) > +#define GICD_SETSPI_NSR (0x040) > +#define GICD_CLRSPI_NSR (0x048) > +#define GICD_SETSPI_SR (0x050) > +#define GICD_CLRSPI_SR (0x058) > +#define GICD_IGROUPR (0x080) > +#define GICD_IGROUPRN (0x0FC) > +#define GICD_ISENABLER (0x100) > +#define GICD_ISENABLERN (0x17C) > +#define GICD_ICENABLER (0x180) > +#define GICD_ICENABLERN (0x1fC) > +#define GICD_ISPENDR (0x200) > +#define GICD_ISPENDRN (0x27C) > +#define GICD_ICPENDR (0x280) > +#define GICD_ICPENDRN (0x2FC) > +#define GICD_ISACTIVER (0x300) > +#define GICD_ISACTIVERN (0x37C) > +#define GICD_ICACTIVER (0x380) > +#define GICD_ICACTIVERN (0x3FC) > +#define GICD_IPRIORITYR (0x400) > +#define GICD_IPRIORITYRN (0x7F8) > +#define GICD_ICFGR (0xC00) > +#define GICD_ICFGRN (0xCFC) > +#define GICD_NSACR (0xE00) > +#define GICD_NSACRN (0xEFC) > +#define GICD_SGIR (0xF00) > +#define GICD_CPENDSGIR (0xF10) > +#define GICD_CPENDSGIRN (0xF1C) > +#define GICD_SPENDSGIR (0xF20) > +#define GICD_SPENDSGIRN (0xF2C) > +#define GICD_IROUTER (0x6000) > +#define GICD_IROUTERN (0x7FF8) > +#define GICD_PIDR0 (0xFFE0) > +#define GICD_PIDR2 (0xFFE8) > +#define GICD_PIDR7 (0xFFDC) Most of this registers are the same as GICv2 except /4 right? If so, it might be interesting to drop the /4 in the GICv2 so we will be able to share most of the VGIC distr code. Regards, -- Julien Grall