From mboxrd@z Thu Jan  1 00:00:00 1970
From: =?ISO-8859-1?Q?Roger_Pau_Monn=E9?= <roger.pau@citrix.com>
Subject: Re: [PATCH v2 3/4] amd-iommu: disable
 iommu_hap_pt_share with AMD IOMMUs
Date: Wed, 23 Apr 2014 16:31:14 +0200
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To: Jan Beulich <JBeulich@suse.com>
Cc: xen-devel@lists.xenproject.org, Xiantao Zhang <xiantao.zhang@intel.com>, Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
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On 23/04/14 12:51, Jan Beulich wrote:
>>>> On 23.04.14 at 12:04, <roger.pau@citrix.com> wrote:
>> On 23/04/14 11:57, Jan Beulich wrote:
>>>>>> On 23.04.14 at 10:16, <roger.pau@citrix.com> wrote:
>>>> According to the comment in p2m.h, AMD IOMMUs don't work correctly
>>>> with page types different than p2m_ram_rw when the p2m is shared
>>>> between HAP and IOMMU, so disable this sharing when using AMD IOMMUs.
>>>
>>> Doesn't this need to go before patch 2?
>>
>> It could certainly go before patch 2, but I don't see such a hard
>> requirement in the ordering (either way AMD hardware needs both patches
>> to work correctly, and applying one before the other is not going to
>> break bisection AFAICT).
> 
> Patch 2 allows the high bits in present IOMMU entries to be non-zero,
> thus allowing for IOMMU faults without this patch already in effect.

Since on AMD hardware iommu_hap_pt_share is always true (unless the user
forces it to false), the previous patch has no effect without this one
(because the previous patch only deals with iommu_hap_pt_share ==
false). I don't mind moving it anyway, and will do it in the next version.

Roger.