From mboxrd@z Thu Jan 1 00:00:00 1970 From: Julien Grall Subject: Re: [PATCH v3 16/16] xen/arm: add SGI handling for GICv3 Date: Thu, 24 Apr 2014 12:43:22 +0100 Message-ID: <5358F8DA.2010308@linaro.org> References: <1397560675-29861-1-git-send-email-vijay.kilari@gmail.com> <1397560675-29861-17-git-send-email-vijay.kilari@gmail.com> <1398337059.18537.330.camel@kazak.uk.xensource.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1398337059.18537.330.camel@kazak.uk.xensource.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Ian Campbell Cc: vijay.kilari@gmail.com, stefano.stabellini@eu.citrix.com, Prasun.Kapoor@caviumnetworks.com, vijaya.kumar@caviumnetworks.com, xen-devel@lists.xen.org, stefano.stabellini@citrix.com List-Id: xen-devel@lists.xenproject.org On 04/24/2014 11:57 AM, Ian Campbell wrote: > On Tue, 2014-04-15 at 16:47 +0530, vijay.kilari@gmail.com wrote: > >> diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c >> index e3d773a..2bef977 100644 >> --- a/xen/arch/arm/vgic-v3.c >> +++ b/xen/arch/arm/vgic-v3.c >> @@ -774,6 +774,85 @@ write_ignore: >> return 1; >> } >> >> +static int vgic_to_sgi(struct vcpu *v, register_t sgir) >> +{ >> + struct domain *d = v->domain; >> + int virq; >> + int irqmode; >> + int vcpuid; >> + int i; >> + unsigned long vcpu_mask = 0; >> + >> + ASSERT(d->max_vcpus < 8*sizeof(vcpu_mask)); > > We get away with an unsigned long and ASSERT on v2 because it is limited > to 8 cpus, but gic v3 supports many more. You didn't change > MAX_VIRT_CPUS in this series, did you? In which case I suppose this is > safe enough for now, but will need to be cleverer at some point in the > future. I didn't see any change of MAX_VIRT_CPUS in this series. If he plans to change it in a next version, we have to check a domain doesn't start with more than 8 CPUs when it's using VGICv2 emulation. Regards, -- Julien Grall