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From: Boris Ostrovsky <boris.ostrovsky@oracle.com>
To: "Tian, Kevin" <kevin.tian@intel.com>
Cc: "keir@xen.org" <keir@xen.org>,
	"Nakajima, Jun" <jun.nakajima@intel.com>,
	"andrew.cooper3@citrix.com" <andrew.cooper3@citrix.com>,
	"Dong, Eddie" <eddie.dong@intel.com>,
	"Dugger, Donald D" <donald.d.dugger@intel.com>,
	"xen-devel@lists.xen.org" <xen-devel@lists.xen.org>,
	"dietmar.hahn@ts.fujitsu.com" <dietmar.hahn@ts.fujitsu.com>,
	"JBeulich@suse.com" <JBeulich@suse.com>,
	"suravee.suthikulpanit@amd.com" <suravee.suthikulpanit@amd.com>
Subject: Re: [PATCH v5 RESEND 12/17] x86/VPMU: Handle PMU interrupts for PV guests
Date: Mon, 28 Apr 2014 10:15:08 -0400	[thread overview]
Message-ID: <535E626C.3010700@oracle.com> (raw)
In-Reply-To: <AADFC41AFE54684AB9EE6CBC0274A5D125E518D0@SHSMSX101.ccr.corp.intel.com>

On 04/26/2014 04:33 AM, Tian, Kevin wrote:
>> From: Boris Ostrovsky [mailto:boris.ostrovsky@oracle.com]
>> Sent: Wednesday, April 23, 2014 8:51 PM
>>
>> Add support for handling PMU interrupts for PV guests.
>>
>> VPMU for the interrupted VCPU is unloaded until the guest issues
>> XENPMU_flush
>> hypercall. This allows the guest to access PMU MSR values that are stored in
>> VPMU context which is shared between hypervisor and domain, thus avoiding
>> traps to hypervisor.
>>
>> Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
>> ---
>>   xen/arch/x86/hvm/vpmu.c  | 110
>> ++++++++++++++++++++++++++++++++++++++++++++---
>>   xen/include/public/pmu.h |   7 +++
>>   2 files changed, 112 insertions(+), 5 deletions(-)
>>
>> diff --git a/xen/arch/x86/hvm/vpmu.c b/xen/arch/x86/hvm/vpmu.c
>> index 789eb2a..abc4c1f 100644
>> --- a/xen/arch/x86/hvm/vpmu.c
>> +++ b/xen/arch/x86/hvm/vpmu.c
>>   int vpmu_do_interrupt(struct cpu_user_regs *regs)
>>   {
>>       struct vcpu *v = current;
>> -    struct vpmu_struct *vpmu = vcpu_vpmu(v);
>> +    struct vpmu_struct *vpmu;
>> +
>> +    /* dom0 will handle this interrupt */
>> +    if ( v->domain->domain_id >= DOMID_FIRST_RESERVED )
>> +        v = dom0->vcpu[smp_processor_id() % dom0->max_vcpus];
>> +
>> +    vpmu = vcpu_vpmu(v);
>> +    if ( !is_hvm_domain(v->domain) )
>> +    {
>> +        /* PV guest or dom0 is doing system profiling */
>> +        const struct cpu_user_regs *gregs;
>> +        int err;
> a bit misleading. if non-dom0, it should be guest profiling only, right?

Right. I meant that either a regular PV guest profiling itself or dom0 
profiling itself and the hypervisor. I possibly also meant here 
XENPMU_MODE_PRIV mode (where dom0 profiles everyone --- itself, 
hypervisor and all guests) but that it introduced in a later patch and 
shouldn't be here yet)

I'll re-phrase it.

-boris

>
> Acked-by: Kevin Tian <kevin.tian@intel.com>

  reply	other threads:[~2014-04-28 14:15 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-04-23 12:50 [PATCH v5 RESEND 00/17] x86/PMU: Xen PMU PV(H) support Boris Ostrovsky
2014-04-23 12:50 ` [PATCH v5 RESEND 01/17] common/symbols: Export hypervisor symbols to privileged guest Boris Ostrovsky
2014-04-23 12:50 ` [PATCH v5 RESEND 02/17] VPMU: Mark context LOADED before registers are loaded Boris Ostrovsky
2014-04-26  8:20   ` Tian, Kevin
2014-04-23 12:50 ` [PATCH v5 RESEND 03/17] x86/VPMU: Minor VPMU cleanup Boris Ostrovsky
2014-04-26  8:20   ` Tian, Kevin
2014-04-28 13:52     ` Boris Ostrovsky
2014-04-23 12:50 ` [PATCH v5 RESEND 04/17] intel/VPMU: Clean up Intel VPMU code Boris Ostrovsky
2014-04-26  8:20   ` Tian, Kevin
2014-04-28 14:00     ` Boris Ostrovsky
2014-04-23 12:50 ` [PATCH v5 RESEND 05/17] x86/VPMU: Handle APIC_LVTPC accesses Boris Ostrovsky
2014-04-26  8:20   ` Tian, Kevin
2014-04-28 14:05     ` Boris Ostrovsky
2014-04-23 12:50 ` [PATCH v5 RESEND 06/17] intel/VPMU: MSR_CORE_PERF_GLOBAL_CTRL should be initialized to zero Boris Ostrovsky
2014-04-26  8:20   ` Tian, Kevin
2014-04-23 12:50 ` [PATCH v5 RESEND 07/17] x86/VPMU: Add public xenpmu.h Boris Ostrovsky
2014-04-26  8:21   ` Tian, Kevin
2014-04-28  9:03     ` Jan Beulich
2014-04-28  9:09       ` Tian, Kevin
2014-04-23 12:50 ` [PATCH v5 RESEND 08/17] x86/VPMU: Make vpmu not HVM-specific Boris Ostrovsky
2014-04-26  8:21   ` Tian, Kevin
2014-04-23 12:50 ` [PATCH v5 RESEND 09/17] x86/VPMU: Interface for setting PMU mode and flags Boris Ostrovsky
2014-04-26  8:21   ` Tian, Kevin
2014-04-23 12:50 ` [PATCH v5 RESEND 10/17] x86/VPMU: Initialize PMU for PV guests Boris Ostrovsky
2014-04-26  8:21   ` Tian, Kevin
2014-04-23 12:50 ` [PATCH v5 RESEND 11/17] x86/VPMU: Add support for PMU register handling on " Boris Ostrovsky
2014-04-26  8:26   ` Tian, Kevin
2014-04-23 12:50 ` [PATCH v5 RESEND 12/17] x86/VPMU: Handle PMU interrupts for " Boris Ostrovsky
2014-04-26  8:33   ` Tian, Kevin
2014-04-28 14:15     ` Boris Ostrovsky [this message]
2014-04-23 12:50 ` [PATCH v5 RESEND 13/17] x86/VPMU: Add privileged PMU mode Boris Ostrovsky
2014-04-26  8:39   ` Tian, Kevin
2014-04-28 14:23     ` Boris Ostrovsky
2014-04-23 12:50 ` [PATCH v5 RESEND 14/17] x86/VPMU: Save VPMU state for PV guests during context switch Boris Ostrovsky
2014-04-26  8:40   ` Tian, Kevin
2014-04-23 12:50 ` [PATCH v5 RESEND 15/17] x86/VPMU: NMI-based VPMU support Boris Ostrovsky
2014-04-26  8:48   ` Tian, Kevin
2014-04-28 17:06     ` Boris Ostrovsky
2014-04-23 12:50 ` [PATCH v5 RESEND 16/17] x86/VPMU: Suport for PVH guests Boris Ostrovsky
2014-04-26  8:50   ` Tian, Kevin
2014-04-23 12:50 ` [PATCH v5 RESEND 17/17] x86/VPMU: Move VPMU files up from hvm/ directory Boris Ostrovsky
2014-04-26  8:52   ` Tian, Kevin
2014-04-24  9:22 ` [PATCH v5 RESEND 00/17] x86/PMU: Xen PMU PV(H) support Tian, Kevin
2014-04-26  8:55 ` Tian, Kevin

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