From mboxrd@z Thu Jan 1 00:00:00 1970 From: Malcolm Crossley Subject: Re: [PATCH v3] hw/passthrough: Prevent QEMU from mapping PCI option ROM at address 0 Date: Mon, 12 May 2014 16:32:29 +0100 Message-ID: <5370E98D.6090409@citrix.com> References: <1399905420-4782-1-git-send-email-malcolm.crossley@citrix.com> <5370FC910200007800011815@mail.emea.novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <5370FC910200007800011815@mail.emea.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Jan Beulich Cc: Ian.Jackson@citrix.com, Paul.Durrant@citrix.com, Ian.Campbell@citrix.com, xen-devel@lists.xen.org List-Id: xen-devel@lists.xenproject.org On 12/05/14 15:53, Jan Beulich wrote: >>>> On 12.05.14 at 16:37, wrote: >> The PCI option ROM BAR uses the LSB to indicate if the BAR is enabled. >> The AMD graphics driver sets the address bit's of the BAR to 0 but leaves the >> LSB set to 1. Whilst this is not good practice, QEMU should be ignoring the >> non address parts of the BAR. >> >> This patch adds masking of the bits 0-10 (4k page) parts of the BAR >> before comparing the address to 0. > > Sorry, but to avoid confusing (future) readers - this is 2k units, not > 4k pages. > Thanks for pointing that out Jan, I was actually intending to ensure nothing is allowed to be mapped to the 0 page and did not realise the option ROM BAR is 2k aligned instead of 4k. I will submit a new patch using XC_PAGE_MASK instead. >> Signed-off-by: Malcolm Crossley > > With the description corrected: > Reviewed-by: Jan Beulich > >