From mboxrd@z Thu Jan 1 00:00:00 1970 From: Malcolm Crossley Subject: Re: [PATCH] hw/passthrough: Prevent QEMU from mapping PCI option ROM at address 0 Date: Mon, 12 May 2014 16:48:06 +0100 Message-ID: <5370ED36.30605@citrix.com> References: <1399898571-6011-1-git-send-email-malcolm.crossley@citrix.com> <21360.58962.995659.57570@mariner.uk.xensource.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <21360.58962.995659.57570@mariner.uk.xensource.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Ian Jackson Cc: xen-devel@lists.xen.org List-Id: xen-devel@lists.xenproject.org On 12/05/14 16:18, Ian Jackson wrote: > Malcolm Crossley writes ("[PATCH] hw/passthrough: Prevent QEMU from mapping PCI option ROM at address 0"): >> The PCI option ROM BAR uses the LSB to indicate if the BAR is enabled. >> The AMD graphics driver sets the address bit's of the BAR to 0 but leaves the >> LSB set to 1. Whilst this is not good practice, QEMU should be ignoring the >> non address parts of the BAR. >> >> This patch adds masking of the non address parts of the BAR before comparing >> the address to 0. > > Is this just for qemu-xen-traditional ? Is there a corresponding > patch to qemu-upstream ? > It is just for qemu-xen-traditional, I've just submitted a v4 patch which expands the masking of the bottom bits up to 4k. MMIO regions are handled differently in qemu-upstream and so a corresponding patch is not required. Malcolm > Ian. >