Re: [PATCH v4] hw/passthrough: Prevent QEMU from mapping PCI option ROM at address 0

[Malcolm Crossley <malcolm.crossley@citrix.com>]

On 12/05/14 16:52, Jan Beulich wrote:
>>>> On 12.05.14 at 17:36, <malcolm.crossley@citrix.com> wrote:
>> The PCI option ROM BAR uses the LSB to indicate if the BAR is enabled.
>> The AMD graphics driver sets the address bit's of the BAR to 0 but leaves 
>> the
>> LSB set to 1. Whilst this is not good practice, QEMU should be ignoring the
>> non address parts of the BAR.
> 
> All you say above only warrants the PCI defined bits to be masked
> off, ...
> 

But we've only got 4k mapping granularity with the IOMMU, so if we try
to map to an address between 2k and 4k then we will overlap with the
bottom 2k which is likely to cause problems.

Malcolm


>> This patch adds masking of the bits 0-11 (4k page) parts of the BAR
>> before comparing the address to 0.
> 
> ... i.e. 0-10 (2k).
> 
> Jan
>