From mboxrd@z Thu Jan 1 00:00:00 1970 From: Julien Grall Subject: Re: [PATCH v6 1/6] xen/arm: IRQ: Store IRQ type in arch_irq_desc Date: Thu, 15 May 2014 18:03:36 +0100 Message-ID: <5374F368.8040008@linaro.org> References: <1399917438-21475-1-git-send-email-julien.grall@linaro.org> <1399917438-21475-2-git-send-email-julien.grall@linaro.org> <1400168737.19926.37.camel@kazak.uk.xensource.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Wkz4F-0004UY-Uc for xen-devel@lists.xenproject.org; Thu, 15 May 2014 17:03:40 +0000 Received: by mail-ee0-f53.google.com with SMTP id c13so861861eek.12 for ; Thu, 15 May 2014 10:03:38 -0700 (PDT) In-Reply-To: <1400168737.19926.37.camel@kazak.uk.xensource.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Ian Campbell Cc: xen-devel@lists.xenproject.org, tim@xen.org, stefano.stabellini@citrix.com List-Id: xen-devel@lists.xenproject.org On 05/15/2014 04:45 PM, Ian Campbell wrote: >> +int irq_set_type(unsigned int spi, unsigned int type) >> +{ >> + unsigned long flags; >> + struct irq_desc *desc = irq_to_desc(spi); >> + int ret = -EBUSY; >> + >> + /* This function should not be used for other than SPIs */ > > Perhaps name the function irq_set_spi_type or something then? > >> + for_each_cpu( cpu, &cpu_online_map ) >> + { >> + desc = &per_cpu(local_irq_desc, cpu)[irq]; >> + spin_lock_irqsave(&desc->lock, flags); >> + desc->arch.type = type; > > Don't you need to write ICFGR on each CPU? This function will bail out if local_irqs_type[irq] == DT_IRQ_TYPE_INVALID. This value means, the IRQ has not been configured and set up (see ASSERT in configure which prevent it). The ICFGR will be configure when Xen set up an handler to this IRQ (see setup_irq). > >> diff --git a/xen/include/xen/device_tree.h b/xen/include/xen/device_tree.h >> index 5542958..e677da9 100644 >> --- a/xen/include/xen/device_tree.h >> +++ b/xen/include/xen/device_tree.h >> @@ -131,6 +131,7 @@ struct dt_phandle_args { >> * DT_IRQ_TYPE_LEVEL_LOW - low level triggered >> * DT_IRQ_TYPE_LEVEL_MASK - Mask to filter out the level bits >> * DT_IRQ_TYPE_SENSE_MASK - Mask for all the above bits >> + * DT_IRQ_TYPE_INVALID - Use to initialize the type >> */ >> #define DT_IRQ_TYPE_NONE 0x00000000 >> #define DT_IRQ_TYPE_EDGE_RISING 0x00000001 >> @@ -143,6 +144,8 @@ struct dt_phandle_args { >> (DT_IRQ_TYPE_LEVEL_LOW | DT_IRQ_TYPE_LEVEL_HIGH) >> #define DT_IRQ_TYPE_SENSE_MASK 0x0000000f >> >> +#define DT_IRQ_TYPE_INVALID 0x00000010 > > 0xffffffff perhaps? The value 0x010 will always return false for edge and level. This is not the case for 0xffffffff because edge/level use different bit. Regards, -- Julien Grall