From: Boris Ostrovsky <boris.ostrovsky@oracle.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: kevin.tian@intel.com, keir@xen.org,
suravee.suthikulpanit@amd.com, andrew.cooper3@citrix.com,
donald.d.dugger@intel.com, xen-devel@lists.xen.org,
dietmar.hahn@ts.fujitsu.com, jun.nakajima@intel.com
Subject: Re: [PATCH v6 17/19] x86/VPMU: NMI-based VPMU support
Date: Mon, 26 May 2014 22:57:01 -0400 [thread overview]
Message-ID: <5383FEFD.6010207@oracle.com> (raw)
In-Reply-To: <538380260200007800015D47@mail.emea.novell.com>
On 05/26/2014 11:55 AM, Jan Beulich wrote:
>
>> +static void vpmu_send_nmi(struct vcpu *v)
>> +{
>> + struct vlapic *vlapic;
>> + u32 vlapic_lvtpc;
>> + unsigned char int_vec;
>> +
>> + ASSERT( is_hvm_vcpu(v) );
>> +
>> + vlapic = vcpu_vlapic(v);
>> + if ( !is_vlapic_lvtpc_enabled(vlapic) )
>> + return;
>> +
>> + vlapic_lvtpc = vlapic_get_reg(vlapic, APIC_LVTPC);
>> + int_vec = vlapic_lvtpc & APIC_VECTOR_MASK;
>> +
>> + if ( GET_APIC_DELIVERY_MODE(vlapic_lvtpc) == APIC_MODE_FIXED )
>> + vlapic_set_irq(vcpu_vlapic(v), int_vec, 0);
>> + else
>> + v->nmi_pending = 1;
> I realize this is only the result of code movement, but what is this
> if/else pair doing?
To be honest, I don't know. This code has been in VPMU since day one
and I just moved it here.
I am not sure whether 'if' clause has ever been tested since perf (and
before that, oprofile) use NMIs for PMU interrupts. But I should
probably at least rename the routine to something like
send_pmu_interrupt (and move int_vec calculation into the 'if' clause).
>> +
>> + if ( (vpmu_mode & XENPMU_MODE_PRIV) ||
>> + (sampled->domain->domain_id >= DOMID_FIRST_RESERVED) )
>> + v = hardware_domain->vcpu[smp_processor_id() %
>> + hardware_domain->max_vcpus];
>> + else
>> + {
>> + if ( is_hvm_domain(sampled->domain) )
>> + {
>> + vpmu_send_nmi(sampled);
>> + return;
>> + }
>> + v = sampled;
>> + }
>> +
>> + regs = &v->arch.vpmu.xenpmu_data->pmu.r.regs;
>> + if ( !is_pv_domain(sampled->domain) )
> Even if it means the same, has_hvm_container_vcpu(sampled)
> please: You're guarding an operation here that requires a HVM
> container.
I am removing PVH-enabling patch (which currently comes after this one)
so all is_*_domain() will hopefully make sense at the time they are added.
>
>> + {
>> + struct segment_register cs;
>> +
>> + hvm_get_segment_register(sampled, x86_seg_cs, &cs);
> I hope you understand that what you read here is only implicitly (due
> to the softirq getting serviced before the guest gets re-entered) the
> current value. Or wait - is it at all? What if a scheduler softirq first
> causes the guest to be de-scheduled and another CPU manages to
> pick it up before you get here?
Based on a similar comment from Kevin I added a check for pending PMU
interrupts (i.e. a call to this routine) in vpmu_save() which is called
during context switch. We should therefore always pick the current value
of guest's CS.
>
>> @@ -472,6 +574,21 @@ static int pvpmu_init(struct domain *d, xen_pmu_params_t *params)
>> return -EINVAL;
>> }
>>
>> + if ( !pvpmu_initted )
>> + {
>> + if (reserve_lapic_nmi() == 0)
> Coding style.
>
>> + set_nmi_callback(pmu_nmi_interrupt);
>> + else
>> + {
>> + printk("Failed to reserve PMU NMI\n");
>> + put_page(page);
>> + return -EBUSY;
>> + }
>> + open_softirq(PMU_SOFTIRQ, pmu_softnmi);
>> +
>> + pvpmu_initted = 1;
> Is it excluded that you get two racing pvpmu_init() calls (i.e. are
> these exclusively coming from e.g. a domctl)? If not, better
> serialization would be needed here.
In Linux the first call (it's not a domctl but a dedicated hypercall) is
done by boot CPU pre-SMP so I think we should be safe.
But then there may be non-Linux users so a lock wouldn't hurt.
-boris
next prev parent reply other threads:[~2014-05-27 2:57 UTC|newest]
Thread overview: 65+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-13 15:53 [PATCH v6 00/19] x86/PMU: Xen PMU PV(H) support Boris Ostrovsky
2014-05-13 15:53 ` [PATCH v6 01/19] common/symbols: Export hypervisor symbols to privileged guest Boris Ostrovsky
2014-05-16 8:05 ` Jan Beulich
2014-05-16 14:58 ` Boris Ostrovsky
2014-05-16 15:16 ` Jan Beulich
2014-05-16 16:12 ` Boris Ostrovsky
2014-06-05 10:29 ` Tim Deegan
2014-05-13 15:53 ` [PATCH v6 02/19] VPMU: Mark context LOADED before registers are loaded Boris Ostrovsky
2014-05-19 14:18 ` Jan Beulich
2014-05-19 15:28 ` Boris Ostrovsky
2014-05-13 15:53 ` [PATCH v6 03/19] x86/VPMU: Minor VPMU cleanup Boris Ostrovsky
2014-05-19 11:55 ` Tian, Kevin
2014-05-19 14:26 ` Jan Beulich
2014-05-19 15:35 ` Boris Ostrovsky
2014-05-19 15:42 ` Jan Beulich
2014-05-13 15:53 ` [PATCH v6 04/19] intel/VPMU: Clean up Intel VPMU code Boris Ostrovsky
2014-05-19 11:59 ` Tian, Kevin
2014-05-19 14:30 ` Jan Beulich
2014-05-13 15:53 ` [PATCH v6 05/19] vmx: Merge MSR management routines Boris Ostrovsky
2014-05-19 12:00 ` Tian, Kevin
2014-05-22 10:24 ` Dietmar Hahn
2014-05-22 13:48 ` Boris Ostrovsky
2014-05-13 15:53 ` [PATCH v6 06/19] x86/VPMU: Handle APIC_LVTPC accesses Boris Ostrovsky
2014-05-13 15:53 ` [PATCH v6 07/19] intel/VPMU: MSR_CORE_PERF_GLOBAL_CTRL should be initialized to zero Boris Ostrovsky
2014-05-13 15:53 ` [PATCH v6 08/19] x86/VPMU: Add public xenpmu.h Boris Ostrovsky
2014-05-19 12:02 ` Tian, Kevin
2014-05-20 15:24 ` Jan Beulich
2014-05-20 17:28 ` Boris Ostrovsky
2014-05-21 7:19 ` Dietmar Hahn
2014-05-21 13:56 ` Boris Ostrovsky
2014-05-13 15:53 ` [PATCH v6 09/19] x86/VPMU: Make vpmu not HVM-specific Boris Ostrovsky
2014-05-13 15:53 ` [PATCH v6 10/19] x86/VPMU: Interface for setting PMU mode and flags Boris Ostrovsky
2014-05-20 15:40 ` Jan Beulich
2014-05-13 15:53 ` [PATCH v6 11/19] x86/VPMU: Initialize PMU for PV guests Boris Ostrovsky
2014-05-20 15:51 ` Jan Beulich
2014-05-20 17:47 ` Boris Ostrovsky
2014-05-21 8:01 ` Jan Beulich
2014-05-21 14:03 ` Boris Ostrovsky
2014-05-20 15:52 ` Jan Beulich
2014-05-13 15:53 ` [PATCH v6 12/19] x86/VPMU: Add support for PMU register handling on " Boris Ostrovsky
2014-05-22 14:50 ` Jan Beulich
2014-05-22 17:16 ` Boris Ostrovsky
2014-05-23 6:27 ` Jan Beulich
2014-05-13 15:53 ` [PATCH v6 13/19] x86/VPMU: Handle PMU interrupts for " Boris Ostrovsky
2014-05-22 15:30 ` Jan Beulich
2014-05-22 17:25 ` Boris Ostrovsky
2014-05-23 6:29 ` Jan Beulich
2014-05-13 15:53 ` [PATCH v6 14/19] x86/VPMU: Merge vpmu_rdmsr and vpmu_wrmsr Boris Ostrovsky
2014-05-19 12:04 ` Tian, Kevin
2014-05-13 15:53 ` [PATCH v6 15/19] x86/VPMU: Add privileged PMU mode Boris Ostrovsky
2014-05-26 11:48 ` Jan Beulich
2014-05-27 2:08 ` Boris Ostrovsky
2014-05-27 9:10 ` Jan Beulich
2014-05-27 13:31 ` Boris Ostrovsky
2014-05-13 15:53 ` [PATCH v6 16/19] x86/VPMU: Save VPMU state for PV guests during context switch Boris Ostrovsky
2014-05-26 12:03 ` Jan Beulich
2014-05-30 21:13 ` Tian, Kevin
2014-05-13 15:53 ` [PATCH v6 17/19] x86/VPMU: NMI-based VPMU support Boris Ostrovsky
2014-05-26 15:55 ` Jan Beulich
2014-05-27 2:57 ` Boris Ostrovsky [this message]
2014-05-30 21:12 ` Tian, Kevin
2014-05-13 15:53 ` [PATCH v6 18/19] x86/VPMU: Suport for PVH guests Boris Ostrovsky
2014-05-13 15:53 ` [PATCH v6 19/19] x86/VPMU: Move VPMU files up from hvm/ directory Boris Ostrovsky
2014-05-16 7:40 ` [PATCH v6 00/19] x86/PMU: Xen PMU PV(H) support Jan Beulich
2014-05-16 14:57 ` Boris Ostrovsky
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