From mboxrd@z Thu Jan 1 00:00:00 1970 From: Julien Grall Subject: Re: [PATCH v2 2/2] xen/arm: observe itarget setting in vgic_enable_irqs and vgic_disable_irqs Date: Tue, 03 Jun 2014 17:33:09 +0100 Message-ID: <538DF8C5.50500@linaro.org> References: <1401811627-4389-2-git-send-email-stefano.stabellini@eu.citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1401811627-4389-2-git-send-email-stefano.stabellini@eu.citrix.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Stefano Stabellini , xen-devel@lists.xensource.com Cc: julien.grall@citrix.com, Ian.Campbell@citrix.com List-Id: xen-devel@lists.xenproject.org Hi Stefano, On 06/03/2014 05:07 PM, Stefano Stabellini wrote: > +static struct vcpu *get_target_vcpu(struct vcpu *v, unsigned int irq) > +{ > + int target; > + struct vgic_irq_rank *rank; > + struct vcpu *v_target; > + > + rank = vgic_irq_rank(v, 1, irq/32); > + vgic_lock_rank(v, rank); > + target = byte_read(rank->itargets[(irq%32)/4], 0, irq % 4); > + target = find_next_bit((const unsigned long *) &target, 8, 0); It might be interesting to add an ASSERT(target < d->max_vcpus) here. Other than that this patch looks good to me: Acked-by: Julien Grall Regards, -- Julien Grall