From mboxrd@z Thu Jan 1 00:00:00 1970 From: Boris Ostrovsky Subject: Re: [PATCH v2 0/6] xen/PMU: PMU support for Xen PV guests Date: Tue, 10 Jun 2014 11:27:11 -0400 Message-ID: <539723CF.3010400@oracle.com> References: <1402076686-26586-1-git-send-email-boris.ostrovsky@oracle.com> <53970EC8.5000506@citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <53970EC8.5000506@citrix.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: David Vrabel Cc: kevin.tian@intel.com, xen-devel@lists.xen.org, dietmar.hahn@ts.fujitsu.com, JBeulich@suse.com List-Id: xen-devel@lists.xenproject.org On 06/10/2014 09:57 AM, David Vrabel wrote: > On 06/06/14 18:44, Boris Ostrovsky wrote: >> (This is the second version of the series. The first one was posted long >> time ago and there are too many changes to list.) >> >> This is the Linux side of Xen PMU support for PV(H) guests, including >> dom0. Only kernel changes are here, toolstack patch will be provided >> separately. >> >> Here is description from the hypervisor patch submission that applies >> to this series as well: >> >> This version has following limitations: >> * For accurate profiling of dom0/Xen dom0 VCPUs should be pinned. >> * Hypervisor code is only profiled on processors that have running dom0 VCPUs >> on them. >> * No backtrace support. > I think there needs to be a plausible plan for how to resolve these > limitations. Come think of it, pinning may not really be a requirement. I suspect a migrating vcpu will have effect similar to what happens when a process migrates to a different processor in bare-metal environment. We may need to add PCPU to report (and there is a reserved u32 filed in perf_sample_data that I may be able to use). Backtraces should not be too big a deal (in theory). I in fact had a prototype at some point. The second bullet is the most challenging, mostly because it may require changes to perf kernel code. I had a couple of ideas but they are rather half-baked. One solution could be to profile only N PCPUs at a time (where N is the number of dom0's VCPUs) and rotate among all PCPUs. -boris