From mboxrd@z Thu Jan 1 00:00:00 1970 From: Julien Grall Subject: Re: [PATCH v4 2/4] xen/arm: inflight irqs during migration Date: Wed, 11 Jun 2014 15:28:50 +0100 Message-ID: <539867A2.4060405@linaro.org> References: <1402076908-26740-2-git-send-email-stefano.stabellini@eu.citrix.com> <1402402359.1250.77.camel@kazak.uk.xensource.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Stefano Stabellini , Ian Campbell Cc: julien.grall@citrix.com, xen-devel@lists.xensource.com List-Id: xen-devel@lists.xenproject.org On 06/11/2014 03:15 PM, Stefano Stabellini wrote: >>> + { >>> + unsigned int irq, target, old_target; >>> + struct vcpu *v_target, *v_old; >>> + >>> + target = i % 8; >>> + >>> + irq = offset + (i / 8); >>> + v_target = v->domain->vcpu[target]; >>> + old_target = byte_read(rank->itargets[REG_RANK_INDEX(8, gicd_reg - GICD_ITARGETSR)], 0, i/8); >>> + v_old = v->domain->vcpu[old_target]; >> >> v_target and v_old might be the same. > > No, they could not: if they were find_next_bit wouldn't find the bit set. Even though v_target is always != v_old (because of the tr = r & ~val stuff), why do you migrate if the old_target will be in the new mask? BTW, this code suffers the same issue as #1, i.e this register can be accessed by byte. Regards, -- Julien Grall