From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paolo Bonzini Subject: Re: [v5][PATCH 0/5] xen: add Intel IGD passthrough support Date: Wed, 25 Jun 2014 09:44:14 +0200 Message-ID: <53AA7DCE.2030100@redhat.com> References: <1403662641-28526-1-git-send-email-tiejun.chen@intel.com> <53AA69E7.8050406@redhat.com> <53AA7BD7.1080309@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <53AA7BD7.1080309@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+gceq-qemu-devel=gmane.org@nongnu.org Sender: qemu-devel-bounces+gceq-qemu-devel=gmane.org@nongnu.org To: "Chen, Tiejun" , anthony.perard@citrix.com, stefano.stabellini@eu.citrix.com, mst@redhat.com, Kelly.Zytaruk@amd.com Cc: peter.maydell@linaro.org, xen-devel@lists.xensource.com, allen.m.kay@intel.com, qemu-devel@nongnu.org, anthony@codemonkey.ws, yang.z.zhang@intel.com List-Id: xen-devel@lists.xenproject.org Il 25/06/2014 09:35, Chen, Tiejun ha scritto: >> How are you going to make this work for Q35 or another PCIe machine that >> already has an ISA bridge at 00:1f.0? >> > > Could we simply pass the vendor/device ids of the host ISA bridge here? No, because the firmware then would not recognize the host ISA bridge and would fail to initialize the ACPI PMBASE, the PCI interrupt routing, etc. Paolo