From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Chen, Tiejun" Subject: Re: [v5][PATCH 0/5] xen: add Intel IGD passthrough support Date: Wed, 25 Jun 2014 18:37:31 +0800 Message-ID: <53AAA66B.5050401@intel.com> References: <53AA8E7D.809@intel.com> <20140625090925.GH32652@redhat.com> <53AA9480.1010005@intel.com> <53AA96DF.6070501@redhat.com> <53AA9B58.6050803@intel.com> <20140625095533.GE6357@redhat.com> <53AA9D79.3080003@redhat.com> <53AA9F3A.5030004@intel.com> <20140625102119.GJ6357@redhat.com> <53AAA452.2090301@intel.com> <20140625103211.GA6884@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20140625103211.GA6884@redhat.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+gceq-qemu-devel=gmane.org@nongnu.org Sender: qemu-devel-bounces+gceq-qemu-devel=gmane.org@nongnu.org To: "Michael S. Tsirkin" Cc: peter.maydell@linaro.org, xen-devel@lists.xensource.com, stefano.stabellini@eu.citrix.com, allen.m.kay@intel.com, Kelly.Zytaruk@amd.com, qemu-devel@nongnu.org, anthony.perard@citrix.com, anthony@codemonkey.ws, yang.z.zhang@intel.com, Paolo Bonzini List-Id: xen-devel@lists.xenproject.org On 2014/6/25 18:32, Michael S. Tsirkin wrote: > On Wed, Jun 25, 2014 at 06:28:34PM +0800, Chen, Tiejun wrote: >> On 2014/6/25 18:21, Michael S. Tsirkin wrote: >>> On Wed, Jun 25, 2014 at 06:06:50PM +0800, Chen, Tiejun wrote: >>>> On 2014/6/25 17:59, Paolo Bonzini wrote: >>>>> Il 25/06/2014 11:55, Michael S. Tsirkin ha scritto: >>>>>>> You're saying we will reserve a free BAR to address those >>>>>> information to >>>>>>> expose to guest, but which device does this free BAR belong to? The >>>>>> video >>>>>>> device? Or PCH/MCH? >>>>>> >>>>>> If you just want to pass a couple of IDs, then don't, it's a waste. >>>>>> But I still don't know what problem you are trying to solve, >>>>>> looking at guest driver did not help. >>>>> >>>>> It's not just a couple of IDs, it's also random fields of the MCH >>>>> configuration space. Grep drivers/gpu/drm/i915 for bridge_dev. >>>>> >>>> >>>> Paolo, >>>> >>>> No, we're not pointing the bridge_dev here, which is a host bridge at >>>> 00:00.0. >>>> >>>> Here it should be a ISA bridge at 00:1f.0. Please see intel_detect_pch() to >>>> know why we need this. >>>> >>>> Thanks >>>> Tiejun >>>> >>> >>> So what if you dont? >>> >>> if (!pch) >>> DRM_DEBUG_KMS("No PCH found.\n"); >>> >>> Is that all? Seems harmless enough. >>> >> >> I don't read the whole driver completely so I don't know now. I guess the >> driver may go other live path even without this setting in a live, or this >> is a real bug to this driver on Intel platform. >> >> But anyway, I think we should guarantee the driver work under the same >> configuration as the native in the passthrough case. >> >> Thanks >> Tiejun > > Just get it working as a first step. Then address theoretical > issues in follow-up patches. > I'm not sure if we can simply. So I will post this to the driver developer to ask more. Thanks Tiejun