From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Chen, Tiejun" Subject: Re: [Xen-devel] [v5][PATCH 0/5] xen: add Intel IGD passthrough support Date: Wed, 02 Jul 2014 15:56:12 +0800 Message-ID: <53B3BB1C.2000501@intel.com> References: <53B110CA.6070606@intel.com> <20140630090511.GB15777@redhat.com> <53B1BAF9.6040800@citrix.com> <20140701053907.GA6108@redhat.com> <20140701170206.GB7640@redhat.com> <53B2F238.7000009@citrix.com> <20140701180625.GC7640@redhat.com> <53B30BFF.4020702@citrix.com> <20140702061107.GF3773@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20140702061107.GF3773@redhat.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+gceq-qemu-devel=gmane.org@nongnu.org Sender: qemu-devel-bounces+gceq-qemu-devel=gmane.org@nongnu.org To: "Michael S. Tsirkin" , Ross Philipson Cc: "peter.maydell@linaro.org" , "xen-devel@lists.xensource.com" , "Allen M. Kay" , "Kelly.Zytaruk@amd.com" , "qemu-devel@nongnu.org" , Anthony Perard , Stefano Stabellini , "anthony@codemonkey.ws" , "yang.z.zhang@intel.com" , Paolo Bonzini List-Id: xen-devel@lists.xenproject.org On 2014/7/2 14:11, Michael S. Tsirkin wrote: > On Tue, Jul 01, 2014 at 03:29:03PM -0400, Ross Philipson wrote: >> On 07/01/2014 02:06 PM, Michael S. Tsirkin wrote: >>> On Tue, Jul 01, 2014 at 01:39:04PM -0400, Ross Philipson wrote: >> >> [snip] >> >>> >>> What class does your ISA bridge device have? >> >> #define PCI_CLASS_BRIDGE_ISA 0x0601 > > Okay I guessed so. But IIRC Tiejun's suggesting giving it a different Organically we really use this class. But Paolo said this introduce two ISA bridges, then something will be confused. Sorry I can't find that quickly since we have so long discussion, so long email thread :( Thanks Tiejun > class. So we don't know what the effect will be on various guests > without testing. > > >>> >>>>> >>>>>> Also I don't like the idea of tying Tiejun's patch series, that covers a >>>>>> very narrow use case, to something as important and general purpose as >>>>>> upgrading chipset. >>>>> >>>>> If it's true that implementing igd passthrough on top of q35 is much >>>>> cleaner architecturally, then I don't see why we should merge a stop-gap >>>>> solution that we'll need to then support indefinitely. >>>>> >>>>> We are talking about upstreaming functionality that xen already has, right? >>>>> So there's no time to market concern, whoever wants a solution today >>>>> has it. Why not do it in the cleanest possible way? >>>>> >>>> >>>> >>>> -- >>>> Ross Philipson >>> >>> ----- >>> No virus found in this message. >>> Checked by AVG - www.avg.com >>> Version: 2014.0.4592 / Virus Database: 3986/7769 - Release Date: 06/30/14 >>> >> >> >> -- >> Ross Philipson > >