From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Razvan Cojocaru <rcojocaru@bitdefender.com>, xen-devel@lists.xen.org
Cc: mdontu@bitdefender.com, tim@xen.org, JBeulich@suse.com
Subject: Re: [PATCH RFC V2 5/6] xen, libxc: Request page fault injection via libxc
Date: Thu, 17 Jul 2014 13:38:53 +0100 [thread overview]
Message-ID: <53C7C3DD.7000105@citrix.com> (raw)
In-Reply-To: <53C7BFEA.8040002@bitdefender.com>
On 17/07/14 13:22, Razvan Cojocaru wrote:
> On 07/11/2014 09:06 PM, Andrew Cooper wrote:
>> On 11/07/14 16:43, Razvan Cojocaru wrote:
>>> + && !ctxt.pending_event
>>> + && ctxt.cr3 == d->fault_info.address_space )
>>> + {
>>> + /* Cache */
>>> + uint64_t virtual_address = d->fault_info.virtual_address;
>>> + uint32_t write_access = d->fault_info.write_access;
>>> +
>>> + /* Reset */
>>> + d->fault_info.address_space = 0;
>>> + d->fault_info.virtual_address = 0;
>>> + d->fault_info.write_access = 0;
>>> +
>>> + hvm_inject_page_fault((write_access << 1) | PFEC_user_mode,
>> It is sensible in the slightest to have write_access shifted by 1 with
>> respect to a real pagefault error code?
> I'm not sure I follow this comment. Could you please elaborate a bit more?
>
>
> Thanks,
> Razvan Cojocaru
You have a user supplied integer, which you shift left by 1 bit and use
as a pagefault error code.
If it is supposed to be a boolean for read/write only, then it should be
treated as such. If it is expected to be a full error code, then it
probably shouldn't be shifted.
~Andrew
next prev parent reply other threads:[~2014-07-17 12:38 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-11 15:43 [PATCH RFC V2 1/6] xen: Emulate with no writes Razvan Cojocaru
2014-07-11 15:43 ` [PATCH RFC V2 2/6] xen: Optimize introspection access to guest state Razvan Cojocaru
2014-07-11 16:54 ` Andrew Cooper
2014-07-11 16:57 ` Andrew Cooper
2014-07-11 18:03 ` Razvan Cojocaru
2014-07-11 18:09 ` Andrew Cooper
2014-07-11 15:43 ` [PATCH RFC V2 3/6] xen: Force-enable relevant MSR events; optimize the number of sent MSR events Razvan Cojocaru
2014-07-11 17:03 ` Andrew Cooper
2014-07-11 18:09 ` Razvan Cojocaru
[not found] ` <CAGU+ausrcu=L7Kf30gZJXRnnxrKe7EMYXTGByOY4agwoK0nXeA@mail.gmail.com>
2014-07-11 18:18 ` Aravindh Puthiyaparambil (aravindp)
2014-07-11 18:19 ` Andrew Cooper
2014-07-11 18:22 ` Razvan Cojocaru
2014-07-11 18:29 ` Andrew Cooper
2014-07-11 15:43 ` [PATCH RFC V2 4/6] xen: Support for VMCALL mem_events Razvan Cojocaru
2014-07-11 17:23 ` Andrew Cooper
2014-07-11 18:15 ` Razvan Cojocaru
2015-03-17 13:50 ` Razvan Cojocaru
2015-03-17 13:58 ` Jan Beulich
2015-03-17 14:07 ` Razvan Cojocaru
2015-03-17 14:20 ` Jan Beulich
2015-03-17 14:33 ` Razvan Cojocaru
2014-07-11 15:43 ` [PATCH RFC V2 5/6] xen, libxc: Request page fault injection via libxc Razvan Cojocaru
2014-07-11 18:06 ` Andrew Cooper
2014-07-17 11:53 ` Ian Campbell
2014-07-17 12:07 ` Razvan Cojocaru
2014-07-17 12:22 ` Razvan Cojocaru
2014-07-17 12:38 ` Andrew Cooper [this message]
2014-07-11 15:43 ` [PATCH RFC V2 6/6] xen: Handle resumed instruction based on previous mem_event reply Razvan Cojocaru
2014-07-11 18:36 ` Andrew Cooper
2014-07-11 18:41 ` Razvan Cojocaru
2014-07-11 19:12 ` Andrew Cooper
2014-07-11 16:23 ` [PATCH RFC V2 1/6] xen: Emulate with no writes Andrew Cooper
2014-07-11 18:00 ` Razvan Cojocaru
2014-07-14 8:37 ` Razvan Cojocaru
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