From: Julien Grall <julien.grall@linaro.org>
To: Ian Campbell <Ian.Campbell@citrix.com>,
Vijay Kilari <vijay.kilari@gmail.com>
Cc: Stefano Stabellini <stefano.stabellini@eu.citrix.com>,
Prasun Kapoor <Prasun.Kapoor@caviumnetworks.com>,
Vijaya Kumar K <vijaya.kumar@caviumnetworks.com>,
Tim Deegan <tim@xen.org>,
"xen-devel@lists.xen.org" <xen-devel@lists.xen.org>,
Stefano Stabellini <stefano.stabellini@citrix.com>,
Jan Beulich <jbeulich@suse.com>,
manish.jaggi@caviumnetworks.com
Subject: Re: [PATCH v8 4/7] xen/arm: Add virtual GICv3 support
Date: Mon, 28 Jul 2014 16:35:46 +0100 [thread overview]
Message-ID: <53D66DD2.7070907@linaro.org> (raw)
In-Reply-To: <1406559353.16498.3.camel@kazak.uk.xensource.com>
On 07/28/2014 03:55 PM, Ian Campbell wrote:
> On Mon, 2014-07-28 at 15:35 +0100, Ian Campbell wrote:
>> FYI I'm seeing a trap in gicv3_init when running on a model. I haven't
>> tracked it down to an actual location yet though. I'll let you know what
>> I find.
>
> The access to ICC_BPR1_EL1 in gicv3_cpu_init is faulting for some
> reason. do_hyp_trap is then access current-> but it is too soon to do
> that, hence a data abort occurs which is what I was seeing.
>
> This is on a fast model with the boot-wrapper, perhaps the "firmware"
> failed to setup something?
IIRC, the "firmware" has to configure some register in secure. I suspect
it's ICC_SRE_EL1.
I guess your bootwrapper already contains this stuff.
> BTW, ICC_BPR1_EL1 is the secure alias of the NS version of the register.
> Why not just use the NS version directly?
AFAIU the spec, the name is not different between secure and non-secure.
The processor will know it following the state.
Regards,
--
Julien Grall
next prev parent reply other threads:[~2014-07-28 15:35 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-23 13:41 [PATCH v8 0/7] xen/arm: Add GICv3 support vijay.kilari
2014-07-23 13:41 ` [PATCH v8 1/7] xen/arm: Introduce sizes.h vijay.kilari
2014-07-28 13:55 ` Ian Campbell
2014-07-23 13:41 ` [PATCH v8 2/7] xen/arm: Stringify the register name in sysreg read write macros vijay.kilari
2014-07-23 17:20 ` Julien Grall
2014-07-28 13:56 ` Ian Campbell
2014-07-23 13:41 ` [PATCH v8 3/7] xen/arm: Add support for GIC v3 vijay.kilari
2014-07-23 17:28 ` Julien Grall
2014-07-24 9:03 ` Ian Campbell
2014-07-24 10:26 ` Julien Grall
2014-07-23 13:41 ` [PATCH v8 4/7] xen/arm: Add virtual GICv3 support vijay.kilari
2014-07-23 13:51 ` Vijay Kilari
2014-07-28 14:35 ` Ian Campbell
2014-07-28 14:55 ` Ian Campbell
2014-07-28 15:08 ` Julien Grall
2014-07-28 15:26 ` Ian Campbell
2014-07-28 15:29 ` Julien Grall
2014-07-28 15:35 ` Julien Grall [this message]
2014-07-28 16:02 ` Ian Campbell
2014-07-28 16:11 ` Julien Grall
2014-07-28 16:25 ` Ian Campbell
2014-07-28 16:30 ` Julien Grall
2014-07-23 13:41 ` [PATCH v8 5/7] xen/arm: Update Dom0 GIC dt node with GICv3 information vijay.kilari
2014-07-23 13:41 ` [PATCH v8 6/7] xen/arm: add SGI handling for GICv3 vijay.kilari
2014-07-23 13:56 ` Stefano Stabellini
2014-07-24 14:37 ` Julien Grall
2014-07-28 14:04 ` Ian Campbell
2014-07-23 13:41 ` [PATCH v8 7/7] xen/arm: check for GICv3 platform support vijay.kilari
2014-07-24 14:45 ` Julien Grall
2014-08-03 21:24 ` [PATCH v8 0/7] xen/arm: Add GICv3 support Julien Grall
2014-08-04 10:06 ` Ian Campbell
2014-08-04 10:25 ` Julien Grall
2014-08-04 10:42 ` Ian Campbell
[not found] ` <CALicx6ucRFNP4A3a2uBPTmhYzKtNWNOvwmPLUfy4Z2DoYDVr3g@mail.gmail.com>
2014-08-04 15:48 ` Ian Campbell
2014-08-06 14:52 ` Vijay Kilari
2014-08-07 14:11 ` Julien Grall
2014-08-28 11:36 ` Vijay Kilari
2014-09-02 23:18 ` Stefano Stabellini
2014-09-03 12:15 ` Ian Campbell
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