From: Julien Grall <julien.grall@linaro.org>
To: Ian Campbell <Ian.Campbell@citrix.com>
Cc: Vijay Kilari <vijay.kilari@gmail.com>,
Stefano Stabellini <stefano.stabellini@eu.citrix.com>,
Prasun Kapoor <Prasun.Kapoor@caviumnetworks.com>,
Vijaya Kumar K <vijaya.kumar@caviumnetworks.com>,
Tim Deegan <tim@xen.org>,
"xen-devel@lists.xen.org" <xen-devel@lists.xen.org>,
Stefano Stabellini <stefano.stabellini@citrix.com>,
Jan Beulich <jbeulich@suse.com>,
manish.jaggi@caviumnetworks.com
Subject: Re: [PATCH v8 4/7] xen/arm: Add virtual GICv3 support
Date: Mon, 28 Jul 2014 17:11:23 +0100 [thread overview]
Message-ID: <53D6762B.6050407@linaro.org> (raw)
In-Reply-To: <1406563342.17854.13.camel@kazak.uk.xensource.com>
On 07/28/2014 05:02 PM, Ian Campbell wrote:
> On Mon, 2014-07-28 at 16:35 +0100, Julien Grall wrote:
>> On 07/28/2014 03:55 PM, Ian Campbell wrote:
>>> On Mon, 2014-07-28 at 15:35 +0100, Ian Campbell wrote:
>>>> FYI I'm seeing a trap in gicv3_init when running on a model. I haven't
>>>> tracked it down to an actual location yet though. I'll let you know what
>>>> I find.
>>>
>>> The access to ICC_BPR1_EL1 in gicv3_cpu_init is faulting for some
>>> reason. do_hyp_trap is then access current-> but it is too soon to do
>>> that, hence a data abort occurs which is what I was seeing.
>>>
>>> This is on a fast model with the boot-wrapper, perhaps the "firmware"
>>> failed to setup something?
>>
>> IIRC, the "firmware" has to configure some register in secure. I suspect
>> it's ICC_SRE_EL1.
>
> _EL3, but otherwise I think you are right.
It might be worse to add a check in Xen that ICC_SRE_EL3 as the SRE bit
enabled.
>> I guess your bootwrapper already contains this stuff.
>
> It turns out it does not because I'm using an old version of the
> upstream bootwrapper modified for Xen.
>
> Unfortunately upstream has moved on in ways which make rebasing the Xen
> support a case of a complete rewrite so I'd been putting it off. Looks
> like it just got bumped up the TODO a bit...
>
>>> BTW, ICC_BPR1_EL1 is the secure alias of the NS version of the register.
>>> Why not just use the NS version directly?
>>
>>
>> AFAIU the spec, the name is not different between secure and non-secure.
>> The processor will know it following the state.
>
> The spec says:
> This register is an alias of the Non-secure view of
> ICC_BPR0_EL1, and a Secure access to this register is identical
> to a Non-secure access to ICC_BPR0_EL1.
>
> So for Xen (necessarily running NS) ICC_BPR0_EL1 and ICC_BPR1_EL1 are
> the same, but accessing BPR0 would seem more natural.
You are right. I read quickly the specification.
Regards,
--
Julien Grall
next prev parent reply other threads:[~2014-07-28 16:11 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-23 13:41 [PATCH v8 0/7] xen/arm: Add GICv3 support vijay.kilari
2014-07-23 13:41 ` [PATCH v8 1/7] xen/arm: Introduce sizes.h vijay.kilari
2014-07-28 13:55 ` Ian Campbell
2014-07-23 13:41 ` [PATCH v8 2/7] xen/arm: Stringify the register name in sysreg read write macros vijay.kilari
2014-07-23 17:20 ` Julien Grall
2014-07-28 13:56 ` Ian Campbell
2014-07-23 13:41 ` [PATCH v8 3/7] xen/arm: Add support for GIC v3 vijay.kilari
2014-07-23 17:28 ` Julien Grall
2014-07-24 9:03 ` Ian Campbell
2014-07-24 10:26 ` Julien Grall
2014-07-23 13:41 ` [PATCH v8 4/7] xen/arm: Add virtual GICv3 support vijay.kilari
2014-07-23 13:51 ` Vijay Kilari
2014-07-28 14:35 ` Ian Campbell
2014-07-28 14:55 ` Ian Campbell
2014-07-28 15:08 ` Julien Grall
2014-07-28 15:26 ` Ian Campbell
2014-07-28 15:29 ` Julien Grall
2014-07-28 15:35 ` Julien Grall
2014-07-28 16:02 ` Ian Campbell
2014-07-28 16:11 ` Julien Grall [this message]
2014-07-28 16:25 ` Ian Campbell
2014-07-28 16:30 ` Julien Grall
2014-07-23 13:41 ` [PATCH v8 5/7] xen/arm: Update Dom0 GIC dt node with GICv3 information vijay.kilari
2014-07-23 13:41 ` [PATCH v8 6/7] xen/arm: add SGI handling for GICv3 vijay.kilari
2014-07-23 13:56 ` Stefano Stabellini
2014-07-24 14:37 ` Julien Grall
2014-07-28 14:04 ` Ian Campbell
2014-07-23 13:41 ` [PATCH v8 7/7] xen/arm: check for GICv3 platform support vijay.kilari
2014-07-24 14:45 ` Julien Grall
2014-08-03 21:24 ` [PATCH v8 0/7] xen/arm: Add GICv3 support Julien Grall
2014-08-04 10:06 ` Ian Campbell
2014-08-04 10:25 ` Julien Grall
2014-08-04 10:42 ` Ian Campbell
[not found] ` <CALicx6ucRFNP4A3a2uBPTmhYzKtNWNOvwmPLUfy4Z2DoYDVr3g@mail.gmail.com>
2014-08-04 15:48 ` Ian Campbell
2014-08-06 14:52 ` Vijay Kilari
2014-08-07 14:11 ` Julien Grall
2014-08-28 11:36 ` Vijay Kilari
2014-09-02 23:18 ` Stefano Stabellini
2014-09-03 12:15 ` Ian Campbell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=53D6762B.6050407@linaro.org \
--to=julien.grall@linaro.org \
--cc=Ian.Campbell@citrix.com \
--cc=Prasun.Kapoor@caviumnetworks.com \
--cc=jbeulich@suse.com \
--cc=manish.jaggi@caviumnetworks.com \
--cc=stefano.stabellini@citrix.com \
--cc=stefano.stabellini@eu.citrix.com \
--cc=tim@xen.org \
--cc=vijay.kilari@gmail.com \
--cc=vijaya.kumar@caviumnetworks.com \
--cc=xen-devel@lists.xen.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).