From mboxrd@z Thu Jan  1 00:00:00 1970
From: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Subject: Re: [PATCH v8 04/19] intel/VPMU: Clean up Intel VPMU
	code
Date: Mon, 28 Jul 2014 12:20:37 -0400
Message-ID: <53D67855.40308@oracle.com>
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To: Jan Beulich <JBeulich@suse.com>
Cc: kevin.tian@intel.com, keir@xen.org, suravee.suthikulpanit@amd.com, andrew.cooper3@citrix.com, tim@xen.org, dietmar.hahn@ts.fujitsu.com, xen-devel@lists.xen.org, David Vrabel <david.vrabel@citrix.com>, jun.nakajima@intel.com
List-Id: xen-devel@lists.xenproject.org

On 07/28/2014 10:00 AM, Jan Beulich wrote:
>>>> On 01.07.14 at 16:37, <boris.ostrovsky@oracle.com> wrote:
>> --- a/xen/arch/x86/hvm/vmx/vpmu_core2.c
>> +++ b/xen/arch/x86/hvm/vmx/vpmu_core2.c
>> @@ -69,6 +69,27 @@
>>   static bool_t __read_mostly full_width_write;
>>   
>>   /*
>> + * MSR_CORE_PERF_FIXED_CTR_CTRL contains the configuration of all fixed
>> + * counters. 4 bits for every counter.
>> + */
>> +#define FIXED_CTR_CTRL_BITS 4
>> +#define FIXED_CTR_CTRL_MASK ((1 << FIXED_CTR_CTRL_BITS) - 1)
>> +
>> +#define VPMU_CORE2_MAX_FIXED_PMCS     4
>> +struct core2_vpmu_context {
>> +    u64 fixed_ctrl;
>> +    u64 ds_area;
>> +    u64 pebs_enable;
>> +    u64 global_ovf_status;
>> +    u64 enabled_cntrs;  /* Follows PERF_GLOBAL_CTRL MSR format */
>> +    u64 fix_counters[VPMU_CORE2_MAX_FIXED_PMCS];
>> +    struct arch_msr_pair arch_msr_pair[1];
> Since you don't really mean [1] here, can you avoid writing it this way?
> Variable length arrays are okay everywhere except in public headers.


This is a pure code movement from (non-public) vpmu_core2.h and [1] will 
disappear in patch 8 when we introduce public VPMU header files.


-boris