From mboxrd@z Thu Jan 1 00:00:00 1970 From: Julien Grall Subject: Re: [PATCH v10 03/10] xen/arm: inflight irqs during migration Date: Tue, 05 Aug 2014 13:28:39 +0100 Message-ID: <53E0CDF7.2000900@linaro.org> References: <1407237989-27654-3-git-send-email-stefano.stabellini@eu.citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1407237989-27654-3-git-send-email-stefano.stabellini@eu.citrix.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Stefano Stabellini , xen-devel@lists.xensource.com Cc: julien.grall@citrix.com, Ian.Campbell@citrix.com List-Id: xen-devel@lists.xenproject.org Hi Stefano, On 08/05/2014 12:26 PM, Stefano Stabellini wrote: > We need to take special care when migrating irqs that are already > inflight from one vcpu to another. See "The effect of changes to an > GICD_ITARGETSR", part of chapter 4.3.12 of the ARM Generic Interrupt > Controller Architecture Specification. NIT: Can you give the reference of the book? ie: IHI 0048B [..] > + i = 0; > + while ( (i = find_next_bit(&target, 32, i)) < 32 ) > + { > + unsigned int irq, new_target, old_target; > + unsigned long old_target_mask; > + struct vcpu *v_target, *v_old; > + > + new_target = i % 8; > + old_target_mask = vgic_byte_read(rank->itargets[REG_RANK_INDEX(8, gicd_reg - GICD_ITARGETSR, DABT_WORD)], 0, i/8); Can you try to split this line? > + old_target = find_first_bit(&old_target_mask, 8); > + > + if ( new_target != old_target ) > + { > + irq = gicd_reg + (i / 8); gicd_reg contains the register offset (i.e GICD_ITARGETSR + off). How can you get the correct IRQ number here? I think this should be irq = gicd_reg - GICD_ITARGETSR + (i / 8); -- Julien Grall