Re: [PATCH RFC 8/9] xen: arm: support for up to 48-bit physical addressing on arm64

[Julien Grall <julien.grall@linaro.org>]

Hi Ian,

On 07/30/2014 02:47 PM, Ian Campbell wrote:
> diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h
> index 9d230f3..979a41d 100644
> --- a/xen/include/asm-arm/processor.h
> +++ b/xen/include/asm-arm/processor.h
> @@ -84,6 +84,38 @@
>  #define HCR_SWIO        (_AC(1,UL)<<1) /* Set/Way Invalidation Override */
>  #define HCR_VM          (_AC(1,UL)<<0) /* Virtual MMU Enable */
>  
> +/* TCR: Stage 1 Translation Control */
> +
> +#define TCR_T0SZ(x)     ((x)<<0)
> +
> +#define TCR_IRGN0_NC    (_AC(0x0,UL)<<8)
> +#define TCR_IRGN0_WBWA  (_AC(0x1,UL)<<8)
> +#define TCR_IRGN0_WT    (_AC(0x2,UL)<<8)
> +#define TCR_IRGN0_WB    (_AC(0x3,UL)<<8)
> +
> +#define TCR_ORGN0_NC    (_AC(0x0,UL)<<10)
> +#define TCR_ORGN0_WBWA  (_AC(0x1,UL)<<10)
> +#define TCR_ORGN0_WT    (_AC(0x2,UL)<<10)
> +#define TCR_ORGN0_WB    (_AC(0x3,UL)<<10)
> +
> +#define TCR_SH0_NS      (_AC(0x0,UL)<<12)
> +#define TCR_SH0_OS      (_AC(0x2,UL)<<12)
> +#define TCR_SH0_IS      (_AC(0x3,UL)<<12)
> +
> +#define TCR_TG0_4K      (_AC(0x0,UL)<<14)
> +#define TCR_TG0_64K     (_AC(0x1,UL)<<14)
> +#define TCR_TG0_16K     (_AC(0x2,UL)<<14)
> +
> +#define TCR_PS(x)       ((x)<<16)
> +
> +#define TCR_TBI         (_AC(0x1,UL)<<20)

TCR_PS and TCR_TBI are armv8 specific. I would only protect them by
#ifdef CONFIG_ARM_64

The rest of the patch looks good to me.

Regards,

-- 
Julien Grall