Re: [V0 PATCH 5/6] AMD-PVH: Support TSC_MODE_NEVER_EMULATE for PVH

[Boris Ostrovsky <boris.ostrovsky@oracle.com>]

On 08/15/2014 09:53 PM, Mukesh Rathor wrote:
> On AMD, MSR_AMD64_TSC_RATIO must be set for rdtsc instruction in guest
> to properly read the cpu tsc. To that end, set tsc_khz in struct domain.
>
> Signed-off-by: Mukesh Rathor <mukesh.rathor@oracle.com>
> ---
>   xen/arch/x86/time.c | 1 +
>   1 file changed, 1 insertion(+)
>
> diff --git a/xen/arch/x86/time.c b/xen/arch/x86/time.c
> index bd89219..7512aa4 100644
> --- a/xen/arch/x86/time.c
> +++ b/xen/arch/x86/time.c
> @@ -1908,6 +1908,7 @@ void tsc_set_info(struct domain *d,
>            * but "always_emulate" does not for some reason.  Figure out
>            * why.
>            */
> +        d->arch.tsc_khz = cpu_khz;
>           switch ( tsc_mode )
>           {
>           case TSC_MODE_NEVER_EMULATE:

I suspect that TSC_MODE DEFAULT may actually work for PVH: since we 
don't support migration it should be equivalent to NEVER_EMULATE.

If you replace in tsc_set_info() is_hvm_domain() with 
is_hvm_container_domain() and allow TSC_MODE_DEFAULT along with 
TSC_MODE_NEVER_EMULATE under 'if (is_pvh_domain())' then it seems to me 
that things should be fine.


-boris