From mboxrd@z Thu Jan 1 00:00:00 1970 From: David Vrabel Subject: Re: [V5 PATCH 1/1] x86/xen: Set EFER.NX and EFER.SCE in PVH guests Date: Fri, 26 Sep 2014 18:26:38 +0100 Message-ID: <5425A1CE.7090704@citrix.com> References: <1410392166-16388-1-git-send-email-mukesh.rathor@oracle.com> <1410392166-16388-2-git-send-email-mukesh.rathor@oracle.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1XXZI3-0007xH-LH for xen-devel@lists.xenproject.org; Fri, 26 Sep 2014 17:26:43 +0000 In-Reply-To: <1410392166-16388-2-git-send-email-mukesh.rathor@oracle.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Mukesh Rathor , boris.ostrovsky@oracle.com, david.vrabel@citrix.com Cc: xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org List-Id: xen-devel@lists.xenproject.org On 11/09/14 00:36, Mukesh Rathor wrote: > This fixes two bugs in PVH guests: > > - Not setting EFER.NX means the NX bit in page table entries is > ignored on Intel processors and causes reserved bit page faults on > AMD processors. > > - After the Xen commit 7645640d6ff1 ("x86/PVH: don't set EFER_SCE for > pvh guest") PVH guests are required to set EFER.SCE to enable the > SYSCALL instruction. > > Secondary VCPUs are started with pagetables with the NX bit set so > EFER.NX must be set before using any stack or data segment. > xen_pvh_cpu_early_init() is the new secondary VCPU entry point that > sets EFER before jumping to cpu_bringup_and_idle(). Applied to devel/for-linus-3.18 Thanks. David