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From: Julien Grall <julien.grall@linaro.org>
To: Suravee Suthikulanit <suravee.suthikulpanit@amd.com>,
	Andrew Cooper <andrew.cooper3@citrix.com>,
	Ian Campbell <ian.campbell@citrix.com>,
	Stefano Stabellini <stefano.stabellini@citrix.com>,
	xen-devel <xen-devel@lists.xen.org>,
	Jan Beulich <jbeulich@suse.com>
Subject: Re: [PATCH for-4.6 0/5] xen: arm: Parse PCI DT nodes' ranges and interrupt-map
Date: Wed, 18 Feb 2015 12:48:15 +0000	[thread overview]
Message-ID: <54E48A0F.80900@linaro.org> (raw)
In-Reply-To: <54E422FE.4080803@amd.com>

Hi Suravee,

On 18/02/2015 05:28, Suravee Suthikulanit wrote:
>
> Actually, that seems to be more related to the PCI pass-through devices.
> Isn't the Cavium guys already done that work to support their PCI device
> pass-through?

They were working on it, but so far there is no patch series on the ML. 
It would be nice to come with a common solution (i.e between GICv2m and 
GICv3 ITS) for MSI.

> Anyways, at this point, I am able to generated Dom0 device tree with
> correct v2m node, and I can see Dom0 gicv2m driver probing and
> initializing correctly as it would on bare-metal.
>
> # Snippet from /sys/firmware/fdt showing dom0 GIC node
>      interrupt-controller {
>          compatible = "arm,gic-400", "arm,cortex-a15-gic";
>          #interrupt-cells = <0x3>;
>          interrupt-controller;
>          reg = <0x0 0xe1110000 0x0 0x1000 0x0 0xe112f000 0x0 0x2000>;
>          phandle = <0x1>;
>          #address-cells = <0x2>;
>          #size-cells = <0x2>;
>          ranges = <0x0 0x0 0x0 0xe1100000 0x0 0x100000>;
>
>          v2m {
>              compatible = "arm,gic-v2m-frame";
>              msi-controller;
>              arm,msi-base-spi = <0x40>;
>              arm,msi-num-spis = <0x100>;
>              phandle = <0x5>;
>              reg = <0x0 0x80000 0x0 0x1000>;
>          };
>      };
>
> linux:~ # dmesg | grep v2m
> [    0.000000] GICv2m: Overriding V2M MSI_TYPER (base:64, num:256)
> [    0.000000] GICv2m: Node v2m: range[0xe1180000:0xe1180fff], SPI[64:320]
>
> So, during setting up v2m in hypervisor, I also call
> route_irq_to_guest() for the all SPIs used for MSI (i.e. 64-320 on
> Seattle), which will force the MSIs to Dom0. However, we would need to
> figure out how to detach and re-route certain interrupts to a specific
> DomU in case of passing through PCI devices in the future.

Who decide to assign the MSI n to the SPI x? DOM0 or Xen?

Wouldn't it be possible to route the SPI dynamically when the domain 
decide to use the MSI n? We would need to implement PHYSDEVOP_map_pirq 
for MSI.

[..]

> And there you have it.... GICv2m MSI(-X) supports in Dom 0 for Seattle
> ;)  Thanks to Ian's PCI patch, which makes porting much simpler.
>
> Next, I'll clean up the code and send out Xen patch for review. I'll
> also push Linux changes (for adding ARM64 PCI Generic host controller
> supports and MSI IRQ domain from Marc) into my Linux tree on Github.
> Then you could give it a try on your Seattle box.

Congrats!

-- 
Julien Grall

  reply	other threads:[~2015-02-18 12:48 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-10-24  9:58 [PATCH for-4.6 0/5] xen: arm: Parse PCI DT nodes' ranges and interrupt-map Ian Campbell
2014-10-24  9:58 ` [PATCH 1/5] xen: arm: propagate gic's #address-cells property to dom0 Ian Campbell
2014-10-29 19:03   ` Julien Grall
2014-10-30 10:06     ` Ian Campbell
2014-10-30 10:31       ` Julien Grall
2014-11-04 10:23     ` Ian Campbell
2014-11-04 17:11       ` Konrad Rzeszutek Wilk
2014-11-05 10:47         ` Ian Campbell
2014-10-24  9:58 ` [PATCH 2/5] xen: device-tree: add accessors for the addr/size-cells of a node's children Ian Campbell
2014-10-24  9:58 ` [PATCH 3/5] xen: arm: Add DT_NR_GIC_INTERRUPT_CELLS rather than hardcoding 3 Ian Campbell
2014-10-24  9:58 ` [PATCH 4/5] xen: refactor irq_set_type out of platform_get_irq Ian Campbell
2014-10-24  9:58 ` [PATCH 5/5] xen: arm: handle PCI DT node ranges and interrupt-map properties Ian Campbell
2015-02-17 17:33   ` Julien Grall
2015-02-18 13:50     ` Ian Campbell
2015-02-18 14:19       ` Julien Grall
2015-02-18 14:37         ` Ian Campbell
2015-02-18 15:05           ` Julien Grall
2015-02-18 15:16             ` Julien Grall
2015-03-05 12:43               ` Ian Campbell
2015-03-05 15:59                 ` Julien Grall
2015-02-18 15:18             ` Ian Campbell
2015-02-18 15:31               ` Julien Grall
2015-02-18 15:44                 ` Ian Campbell
2015-02-18 15:13           ` Julien Grall
2015-02-18 15:21             ` Ian Campbell
2015-02-16  3:49 ` [PATCH for-4.6 0/5] xen: arm: Parse PCI DT nodes' ranges and interrupt-map Suravee Suthikulpanit
2015-02-16 10:12   ` Julien Grall
     [not found]     ` <54E2AFCC.3090302@amd.com>
2015-02-17 13:43       ` Julien Grall
2015-02-17 13:50         ` Andrew Cooper
2015-02-17 22:35           ` Suravee Suthikulanit
2015-02-18  0:31             ` Suravee Suthikulanit
2015-02-18  5:28               ` Suravee Suthikulanit
2015-02-18 12:48                 ` Julien Grall [this message]
2015-02-18 20:13                   ` Suravee Suthikulanit
2015-02-19  5:16                     ` Manish
2015-02-19  8:14                     ` Jan Beulich
2015-02-19  8:47                       ` Manish
2015-02-19 13:46                     ` Julien Grall
2015-02-18  7:58               ` Jan Beulich
2015-02-18 13:52   ` Ian Campbell

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