From mboxrd@z Thu Jan 1 00:00:00 1970 From: David Vrabel Subject: Re: [PATCH] x86/MSI: fix guest unmasking when handling IRQ via event channel Date: Wed, 8 Jul 2015 12:14:09 +0100 Message-ID: <559D0601.3090009@citrix.com> References: <559D01DE020000780008E03C@mail.emea.novell.com> <559CEFD5.6020906@citrix.com> <559D1E58020000780008E1E6@mail.emea.novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail6.bemta14.messagelabs.com ([193.109.254.103]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1ZCnIu-000828-F5 for xen-devel@lists.xenproject.org; Wed, 08 Jul 2015 11:14:16 +0000 In-Reply-To: <559D1E58020000780008E1E6@mail.emea.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Jan Beulich , David Vrabel , Julien Grall Cc: Keir Fraser , Stefano Stabellini , Andrew Cooper , TimDeegan , Ian Campbell , SanderEikelenboom , xen-devel , Ian Jackson List-Id: xen-devel@lists.xenproject.org On 08/07/15 11:58, Jan Beulich wrote: >>>> On 08.07.15 at 11:39, wrote: >> On 08/07/15 09:56, Jan Beulich wrote: >>> Rather than assuming only PV guests need special treatment (and >>> dealing with that directly when an IRQ gets set up), keep all guest MSI >>> IRQs masked until either the (HVM) guest unmasks them via vMSI or the >>> (PV, PVHVM, or PVH) guest sets up an event channel for it. >>> >>> To not further clutter the common evtchn_bind_pirq() with x86-specific >>> code, introduce an arch_evtchn_bind_pirq() hook instead. >> >> Can you describe the symptoms of the bug being fixed here? > > Interrupts simply didn't get unmasked for PVHVM Linux guests. > >>> --- a/xen/include/asm-arm/irq.h >>> +++ b/xen/include/asm-arm/irq.h >>> @@ -47,6 +47,8 @@ int release_guest_irq(struct domain *d, >>> >>> void arch_move_irqs(struct vcpu *v); >>> >>> +#define arch_evtchn_bind_pirq(d, pirq) ((void)((d) + (pirq))) >> >> Would this be better as a inline function? >> >>> + >>> /* Set IRQ type for an SPI */ >>> int irq_set_spi_type(unsigned int spi, unsigned int type); >>> >>> --- a/xen/include/xen/irq.h >>> +++ b/xen/include/xen/irq.h >>> @@ -172,4 +172,8 @@ unsigned int set_desc_affinity(struct ir >>> unsigned int arch_hwdom_irqs(domid_t); >>> #endif >>> >>> +#ifndef arch_evtchn_bind_pirq >>> +void arch_evtchn_bind_pirq(struct domain *, int pirq); >> >> ... moving this into xen/include/asm-x86/irq.h > > Oh, right, (also to Julien) - this is exactly the reason I do not want it > to be an inline function for ARM: I want the declaration here, not > replicated in every interested arch's header. Ok. FWIW, with this requirement I would (instead of the macros) add a weak arch_evtchn_bind_pirq() that's a no-op. David