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From: Andrew Cooper <andrew.cooper3@citrix.com>
To: xen-devel@lists.xen.org
Subject: Re: [PATCH 2/2 v2] xen: arm: Set all bits in mfn_to_xen_entry()
Date: Fri, 21 Aug 2015 14:39:04 +0100	[thread overview]
Message-ID: <55D729F8.30803@citrix.com> (raw)
In-Reply-To: <1440113595-6961-3-git-send-email-chris.brand@broadcom.com>

On 21/08/15 00:33, Chris Brand wrote:
> Ensure that every bit has a specific value.
>
> Reported-by: Julien Grall <julien.grall@citrix.com>
> Signed-off-by: Chris Brand <chris.brand@broadcom.com>
> ---
> v2 adds comments on pxn and avail.

This is no functional change, if the compiler is conforming to the C spec.

The spec guarantees that structure initialisation like this causes
unspecified names to gain their default value.  As these are integer
bitfields, the default value is 0.

What compiler is in use?  It would appear that it is buggy, or at least
has buggy scalar replacement optimisations.

~Andrew

>
>  xen/include/asm-arm/page.h | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/xen/include/asm-arm/page.h b/xen/include/asm-arm/page.h
> index 01628f3e96cb..4f430a5ff4fa 100644
> --- a/xen/include/asm-arm/page.h
> +++ b/xen/include/asm-arm/page.h
> @@ -202,9 +202,14 @@ static inline lpae_t mfn_to_xen_entry(unsigned long mfn, unsigned attr)
>              .ai = attr,
>              .ns = 1,              /* Hyp mode is in the non-secure world */
>              .user = 1,            /* See below */
> +            .ro = 0,              /* Assume read-write */
>              .af = 1,              /* No need for access tracking */
>              .ng = 1,              /* Makes TLB flushes easier */
> +            .sbz = 0,
> +            .contig = 0,          /* Assume non-contiguous */
> +            .pxn = 0,             /* Reserved for PL2 stage 1 page table */
>              .xn = 1,              /* No need to execute outside .text */
> +            .avail = 0,           /* Reference count for domheap mapping */
>          }};;
>      /* Setting the User bit is strange, but the ATS1H[RW] instructions
>       * don't seem to work otherwise, and since we never run on Xen

  reply	other threads:[~2015-08-21 13:39 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-08-20 23:33 [PATCH 0/2 v2] xen: arm: Ensure all PTE bits have a known value Chris Brand
2015-08-20 23:33 ` [PATCH 1/2 v2] xen: arm re-order assignments in mfn_to_xen_entry() Chris Brand
2015-09-01 15:51   ` Ian Campbell
2015-08-20 23:33 ` [PATCH 2/2 v2] xen: arm: Set all bits " Chris Brand
2015-08-21 13:39   ` Andrew Cooper [this message]
2015-08-21 19:47     ` Chris (Christopher) Brand
2015-08-21 23:45       ` Julien Grall
2015-09-01 15:50   ` Ian Campbell

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