From mboxrd@z Thu Jan 1 00:00:00 1970 From: Julien Grall Subject: Re: [PATCH v6 24/31] xen/arm: ITS: Add GICR register emulation Date: Wed, 9 Sep 2015 17:11:17 +0100 Message-ID: <55F05A25.8050206@citrix.com> References: <1441019208-2764-1-git-send-email-vijay.kilari@gmail.com> <1441019208-2764-25-git-send-email-vijay.kilari@gmail.com> <55ED9D28.7050902@citrix.com> <1441806948.24450.327.camel@citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1441806948.24450.327.camel@citrix.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Ian Campbell , Vijay Kilari Cc: Stefano Stabellini , Prasun Kapoor , Vijaya Kumar K , Tim Deegan , "xen-devel@lists.xen.org" , Stefano Stabellini , manish.jaggi@caviumnetworks.com List-Id: xen-devel@lists.xenproject.org On 09/09/15 14:55, Ian Campbell wrote: >>> Based on the spec, those 2 checks are wrong and make impossible to use >>> LPIs. Please test this patch series before sending it on the ML. >> >> Why do you think so?. > > Consider which LPI is the subject of the word at the address pointed to by > GICR_PROPBASER. I think it is LPI==0 (== IRQ 8192), whereas this code > suggests that you think the entry for LPI==0 is at offset 8192 in the prop > table, which I don't think is correct. For the spec section: 6.1.2 in ARM IHI 0069A. Regards, -- Julien Grall