From mboxrd@z Thu Jan 1 00:00:00 1970 From: Julien Grall Subject: Re: [PATCH] IOMMU: complete/correct comment explaining "iommu=" sub-options Date: Tue, 22 Sep 2015 10:31:26 +0100 Message-ID: <56011FEE.4010305@citrix.com> References: <560119AD02000078000A4329@prv-mh.provo.novell.com> <56010028.9040202@citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: Received: from mail6.bemta14.messagelabs.com ([193.109.254.103]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1ZeJvA-00040z-16 for xen-devel@lists.xenproject.org; Tue, 22 Sep 2015 09:31:32 +0000 In-Reply-To: <56010028.9040202@citrix.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Andrew Cooper , Jan Beulich , xen-devel List-Id: xen-devel@lists.xenproject.org Hi, On 22/09/2015 08:15, Andrew Cooper wrote: > On 22/09/2015 08:04, Jan Beulich wrote: >> Signed-off-by: Jan Beulich > > Reviewed-by: Andrew Cooper > > Some of these are overly Intel-specific, but while AMD has no > implementation, this isn't much of a problem. Note that on ARM, we are only using off|no|false|disable. We may want to use dom0-strict at some point. Regards, -- Julien Grall