From mboxrd@z Thu Jan  1 00:00:00 1970
From: Andrew Cooper <andrew.cooper3@citrix.com>
Subject: Re: [PATCH] x86: detect CMOS aliasing on ports other
	then 0x70/0x71
Date: Wed, 23 Sep 2015 19:34:38 +0100
Message-ID: <5602F0BE.6070801@citrix.com>
References: <56016F7B02000078000A45DA@prv-mh.provo.novell.com>
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To: Jan Beulich <JBeulich@suse.com>, xen-devel <xen-devel@lists.xenproject.org>
Cc: Keir Fraser <keir@xen.org>
List-Id: xen-devel@lists.xenproject.org

On 22/09/15 14:10, Jan Beulich wrote:
> +    for ( offs = 2; offs < 8; offs <<= 1 )
> +    {
> +        bool_t read = 1;
> +
> +        for ( i = RTC_REG_D + 1; i < 0x80; ++i )
> +        {
> +            uint8_t normal, alt;
> +            unsigned long flags;
> +
> +            if ( i == acpi_gbl_FADT.century )
> +                continue;
> +
> +            spin_lock_irqsave(&rtc_lock, flags);
> +
> +            normal = CMOS_READ(i);
> +            if ( inb(RTC_PORT(offs)) != i )
> +                read = 0;
> +
> +            alt = inb(RTC_PORT(offs + 1));
> +
> +            spin_unlock_irqrestore(&rtc_lock, flags);
> +
> +            if ( normal != alt )
> +                break;

Even with a manual to hand, this logic is quite hard to understand. 
Furthermore, I still cant spot how your r/w vs w/o logic is supposed to
work.  It doesn't check the writability of the alias, but of the aliases
index.

However, it is not robust to the system servicing an SMI and altering
the CMOS ram in the middle of this loop.  Such a modification would
cause the loop to believe that this specific 'offs' is not an alias even
when it actually is.

One option would be to reread the non-aliased port again, but that would
add yet more io reads.

~Andrew