From mboxrd@z Thu Jan 1 00:00:00 1970 From: David Vrabel Subject: Re: [PATCHv2 1/3] x86/fpu: improve check for XSAVE* not writing FIP/FDP fields Date: Tue, 23 Feb 2016 11:54:16 +0000 Message-ID: <56CC4868.8040504@citrix.com> References: <1456225539-9162-1-git-send-email-david.vrabel@citrix.com> <1456225539-9162-2-git-send-email-david.vrabel@citrix.com> <56CC3FE8.4000805@citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1aYBXo-0004dK-L8 for xen-devel@lists.xenproject.org; Tue, 23 Feb 2016 11:54:20 +0000 In-Reply-To: <56CC3FE8.4000805@citrix.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Andrew Cooper , David Vrabel , xen-devel@lists.xenproject.org Cc: Jan Beulich List-Id: xen-devel@lists.xenproject.org On 23/02/16 11:18, Andrew Cooper wrote: > On 23/02/16 11:05, David Vrabel wrote: >> The hardware may not write the FIP/FDP fields with a XSAVE* >> instruction. e.g., with XSAVEOPT/XSAVES if the state hasn't changed >> or on AMD CPUs when a floating point exception is not pending. We >> need to identify this case so we can correctly apply the check for >> whether to save/restore FCS/FDS. >> >> By toggling FIP[63] we can turn the field into a non-canonical address >> and check for this value after the XSAVE instruction. >> >> This results in smaller code with fewer branches and is more >> understandable. >> >> Signed-off-by: David Vrabel > > For consistently, the same change in detection logic should be applied > to fpu_fxsave() I don't think it is necessary. fpu_fxsave() only needs to check for the AMD case, and the logic is already simple. David