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* [Question] About the behavior of HLT in VMX guest mode
@ 2017-03-13  5:12 Longpeng (Mike)
  2017-03-13 11:38 ` Jan Beulich
  0 siblings, 1 reply; 4+ messages in thread
From: Longpeng (Mike) @ 2017-03-13  5:12 UTC (permalink / raw)
  To: kevin.tian, JBeulich
  Cc: xen-devel, xuquan8, Gonglei, Herongguang (Stephen),
	Longpeng(Mike)

Hi guys,

I'm confusing about the behavior of HLT instruction in VMX guest mode.

I set "hlt exiting" bit to 0 in VMCS, and the vcpu didn't vmexit when execute
HLT as expected. However, I used powertop/cpupower on host to watch the pcpu's
c-states, it seems that the pcpu didn't enter C1/C1E state during this period.

I searched the Intel spec vol-3, and only found that guest MWAIT won't entering
a low-power sleep state under certain conditions(ch 25.3), but not mentioned HLT.

My questions are
1) Does executing HLT instruction in guest-mode won't enter C1/C1E state ?
2) If it won't, then whether it would release the hardware resources shared with
another hyper-thread ?

Any suggestion would be greatly appreciated, thanks!

-- 
Regards,
Longpeng(Mike)


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^ permalink raw reply	[flat|nested] 4+ messages in thread

* [Question] About the behavior of HLT in VMX guest mode
@ 2017-03-13  6:12 Longpeng (Mike)
  0 siblings, 0 replies; 4+ messages in thread
From: Longpeng (Mike) @ 2017-03-13  6:12 UTC (permalink / raw)
  To: kevin.tian, JBeulich; +Cc: xuquan8, Gonglei, Herongguang (Stephen), xen-devel

Hi guys,

I'm confusing about the behavior of HLT instruction in VMX guest mode.

I set "hlt exiting" bit to 0 in VMCS, and the vcpu didn't vmexit when execute
HLT as expected. However, I used powertop/cpupower on host to watch the pcpu's
c-states, it seems that the pcpu didn't enter C1/C1E state during this period.

I searched the Intel spec vol-3, and only found that guest MWAIT won't entering
a low-power sleep state under certain conditions(ch 25.3), but not mentioned HLT.

My questions are
1) Does executing HLT instruction in guest-mode won't enter C1/C1E state ?
2) If it won't, then whether it would release the hardware resources shared with
another hyper-thread ?

Any suggestion would be greatly appreciated, thanks!

-- 
Regards,
Longpeng(Mike)


_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
https://lists.xen.org/xen-devel

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [Question] About the behavior of HLT in VMX guest mode
  2017-03-13  5:12 [Question] About the behavior of HLT in VMX guest mode Longpeng (Mike)
@ 2017-03-13 11:38 ` Jan Beulich
  2017-03-14  1:11   ` Longpeng (Mike)
  0 siblings, 1 reply; 4+ messages in thread
From: Jan Beulich @ 2017-03-13 11:38 UTC (permalink / raw)
  To: Longpeng (Mike)
  Cc: kevin.tian, xen-devel, xuquan8, Gonglei, Herongguang (Stephen)

>>> On 13.03.17 at 06:12, <longpeng2@huawei.com> wrote:
> I'm confusing about the behavior of HLT instruction in VMX guest mode.
> 
> I set "hlt exiting" bit to 0 in VMCS, and the vcpu didn't vmexit when execute
> HLT as expected. However, I used powertop/cpupower on host to watch the pcpu's
> c-states, it seems that the pcpu didn't enter C1/C1E state during this 
> period.

I guess no-one expects a VMM to want to set this control to zero,
so the behavior may well be unspecified or model-specific. Neither
of which I'm in the position to comment on, so I can only defer to
the Intel guys.

Jan


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* Re: [Question] About the behavior of HLT in VMX guest mode
  2017-03-13 11:38 ` Jan Beulich
@ 2017-03-14  1:11   ` Longpeng (Mike)
  0 siblings, 0 replies; 4+ messages in thread
From: Longpeng (Mike) @ 2017-03-14  1:11 UTC (permalink / raw)
  To: Jan Beulich
  Cc: kevin.tian, xen-devel, xuquan8, Gonglei, Herongguang (Stephen)

Hi Jan,

On 2017/3/13 19:38, Jan Beulich wrote:

>>>> On 13.03.17 at 06:12, <longpeng2@huawei.com> wrote:
>> I'm confusing about the behavior of HLT instruction in VMX guest mode.
>>
>> I set "hlt exiting" bit to 0 in VMCS, and the vcpu didn't vmexit when execute
>> HLT as expected. However, I used powertop/cpupower on host to watch the pcpu's
>> c-states, it seems that the pcpu didn't enter C1/C1E state during this 
>> period.
> 
> I guess no-one expects a VMM to want to set this control to zero,


Yep, I agree. I just do this for special purpose.

> so the behavior may well be unspecified or model-specific. Neither

> of which I'm in the position to comment on, so I can only defer to
> the Intel guys.


Thanks. :)

> 
> Jan
> 
> 
> .
> 


-- 
Regards,
Longpeng(Mike)


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2017-03-13  5:12 [Question] About the behavior of HLT in VMX guest mode Longpeng (Mike)
2017-03-13 11:38 ` Jan Beulich
2017-03-14  1:11   ` Longpeng (Mike)
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2017-03-13  6:12 Longpeng (Mike)

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